RM48L952: Watchdog monitoring program sequence

Hi Monitor,

The watchdog timer is based on a counter that counts down from some initial value to zero. The software specifies the counter’s initial value and periodically restarts it by servicing the watchdog within the time window. If the counter ever reaches zero before the watchdog is serviced, the software is presumed to be malfunctioning, and either the processor’s reset signal or a NMI interrupt signal is asserted.

A watchdog timer can get a system out of a lot of dangerous situations. However, you need to know what kinds of things could go wrong with your software, and ensure that the watchdog timer will detect them, if any occur. The maximum watchdog expiration time is (4095 + 1) × 2^13/RTICLK. It will be a challenge if some part of your software takes a long time to complete.

I am not sure how to monitor the program sequence using the watchdog. 

Thanks, Wang,

Our requirement is by using the external watchdog IC, we want to monitor the program sequence. Also, the other requirement is watchdog should reset the MCU when any kind of ESM error occurs.

So, we want to choose the watchdog IC which shall satisfy the above cases. 

Regards,

Monish P 

Hi Wang,

Please provide your suggestions, if any.

Hi Wang,

In reference to the safety manual for RM48 (SPNU577D), the external watchdog should include a combination of temporal and logical monitoring of program sequence.

In the case of TPS65381, is it possible to achieve this condition in both Trigger Mode (OPEN/CLOSE Window) or Question and Answer Mode? If yes, how can it be achieved in the user application? Please provide examples if any for both cases.

Thanks and Regards,

Monish P 

Hi TI,

Please provide your feedback on the above question.

Whether monitoring program sequence can be implemented in trigger mode? If yes, then how can it be implemented? Provide an example if any?

Regards,

Monish P