Other Parts Discussed in Thread: HALCOGEN
Hi I am trying to use the GIO functionality for the SCI1, SCI3 and SCI4 modules, I have used Halcogen so configure the port and I am using the below to drive the ports in my code.
gioToggleBit(sciPORT3, PIN_SCI_TX); /* Toggle sciPORT3 "SCI3TX" in GIO Mode. */
gioToggleBit(sciPORT3, PIN_SCI_RX); /* Toggle sciPORT3 "SCI3RX" in GIO Mode. */
I have done the above for all SCI ports used. The TX lines work fine and toggle when asked to but none of the RX pins toggle, this seems constant across all SCI module used.
I have tried an alternative approach and used the enum's in HL_sci.h as indicated below but that does also not work.
gioSetBit(sciPORT4,PIN_SCI_RX, 1U);
wait a period then
gioSetBit(sciPORT4,PIN_SCI_RX, 0U);
below is part of the sciInit that's output from Halcogen for SCI4 as example of how its configured.
/** @b initialize @b SCI4 */
/** - bring SCI4 out of reset */
sciREG4->GCR0 = 0U;
sciREG4->GCR0 = 1U;
/** - Disable all interrupts */
sciREG4->CLEARINT = 0xFFFFFFFFU;
sciREG4->CLEARINTLVL = 0xFFFFFFFFU;
/** - global control 1 */
sciREG4->GCR1 = (uint32)((uint32)1U << 25U) /* enable transmit */
| (uint32)((uint32)1U << 24U) /* enable receive */
| (uint32)((uint32)1U << 5U) /* internal clock (device has no clock pin) */
| (uint32)((uint32)(2U-1U) << 4U) /* number of stop bits */
| (uint32)((uint32)0U << 3U) /* even parity, otherwise odd */
| (uint32)((uint32)0U << 2U) /* enable parity */
| (uint32)((uint32)1U << 1U); /* asynchronous timing mode */
/** - set baudrate */
sciREG4->BRS = 487U; /* baudrate */
/** - transmission length */
sciREG4->FORMAT = 8U - 1U; /* length */
/** - set SCI4 pins functional mode */
sciREG4->PIO0 = (uint32)((uint32)0U << 2U) /* tx pin */
| (uint32)((uint32)0U << 1U); /* rx pin */
/** - set SCI4 pins default output value */
sciREG4->PIO3 = (uint32)((uint32)0U << 2U) /* tx pin */
| (uint32)((uint32)0U << 1U); /* rx pin */
/** - set SCI4 pins output direction */
sciREG4->PIO1 = (uint32)((uint32)1U << 2U) /* tx pin */
| (uint32)((uint32)1U << 1U); /* rx pin */
/** - set SCI4 pins open drain enable */
sciREG4->PIO6 = (uint32)((uint32)0U << 2U) /* tx pin */
| (uint32)((uint32)0U << 1U); /* rx pin */
/** - set SCI4 pins pullup/pulldown enable */
sciREG4->PIO7 = (uint32)((uint32)0U << 2U) /* tx pin */
| (uint32)((uint32)0U << 1U); /* rx pin */
/** - set SCI4 pins pullup/pulldown select */
sciREG4->PIO8 = (uint32)((uint32)1U << 2U) /* tx pin */
| (uint32)((uint32)1U << 1U); /* rx pin */
/** - set interrupt level */
sciREG4->SETINTLVL = (uint32)((uint32)0U << 26U) /* Framing error */
| (uint32)((uint32)0U << 25U) /* Overrun error */
| (uint32)((uint32)0U << 24U) /* Parity error */
| (uint32)((uint32)0U << 9U) /* Receive */
| (uint32)((uint32)0U << 8U) /* Transmit */
| (uint32)((uint32)0U << 1U) /* Wakeup */
| (uint32)((uint32)0U << 0U); /* Break detect */
/** - set interrupt enable */
sciREG4->SETINT = (uint32)((uint32)0U << 26U) /* Framing error */
| (uint32)((uint32)0U << 25U) /* Overrun error */
| (uint32)((uint32)0U << 24U) /* Parity error */
| (uint32)((uint32)0U << 9U) /* Receive */
| (uint32)((uint32)0U << 1U) /* Wakeup */
| (uint32)((uint32)0U << 0U); /* Break detect */
/** - initialize global transfer variables */
g_sciTransfer_t[3U].mode = (uint32)0U << 8U;
g_sciTransfer_t[3U].tx_length = 0U;
g_sciTransfer_t[3U].rx_length = 0U;
/** - Finaly start SCI4 */
sciREG4->GCR1 |= 0x80U;
