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AM2634: MCAN register MCAN0_CFG_TXBRP usage

BIkash
Intellectual 365 points

Part Number: AM2634

I am trying to find the handling of the MCAN  register MCAN0_CFG_TXBRP.

From the Datasheet, TRM & Advance TRM its not clear when the TRP bits will be cleared, as these are read only registers, so this must be cleared automatically.

I am using the Tx buffers instead of TxFIFO.I believe the respective bit(0-31) indicates which Tx buffer has a pending message that is yet to transmit on the CanBus.

it will be helpful to know the the sequence need to be followed to  process multiple Tx messages using TxBuffer.

  • 0
    TI__Expert 7586 points

    Hi 

    Thanks for asking the question.

    Assigned it to expert, will get back to you soon.

    Regards

    Sri Vidya

  • 0 in reply to Sri Vidya Gunturi
    Intellectual 365 points

    Hi,

    To add some more info about my situation.

    after i initiated the message transfer, Inside the Can ISR i am monitoring the Register MCAN0_CFG_IR Register(bit 9 - Transmission complete).

    if the TC bit is set then i am monitoring the register MCAN0_CFG_TXBTO in order to identify which Tx Buffer has transmitted the message, but i can see all the 7 bits are always set. i assume these bits are set after a successful transmission, but as this register is RO, so i need to know will it be cleared when there is an new message transfer is initiated for the particular Tx buffer ?

  • +1 in reply to BIkash
    TI__Mastermind 30108 points

    Hi Bikash,

    We're working on improving the AM263x TRM.

    The AM64x/AM243x uses the same MCAN IP as the AM263x. The AM64x/AM243x TRM has more details on the MCAN0_CFG_TXBRP, MCAN0_CFG_IR, MCAN0_CFG_TXBTO registers.

    Please see the following sections in the TRM (https://www.ti.com/lit/ug/spruim2d/spruim2d.pdf):

    • 12.4.1.5.2.37 MCAN_TXBRP Register
    • 12.4.1.5.2.15 MCAN_IR Register
    • 12.4.1.5.2.40 MCAN_TXBTO Register
    BIkash said:
    so i need to know will it be cleared when there is an new message transfer is initiated for the particular Tx buffer ?

    The description of the TXBTO register includes this text:

    Each Tx Buffer has its own Transmission Occurred bit. The bits are set when the corresponding MCAN_TXBRP bit is cleared after a successful transmission. The bits are reset when a new transmission is requested by writing a 1h to the corresponding bit of register the MCAN_TXBAR register.

    Regards,
    Frank

  • 0 in reply to Frank Livingston
    Intellectual 365 points

    Thank You Frank, This helps.