TMS570LC4357: Double bit error when injecting single bit error into CAN-RAM (ESM 1.73 and 1.21)

Hi Max,

I started to work on your issue and i will get back to you soon with an update.

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Thanks & Regards,
Jagadish.

Hi Max,

If we flip single bit, then we should only get single bit error,

Is it possible to you to share your code?

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Thanks & Regards,
Jagadish.

Hi Jagadish,

Unfortunately I can't share the exact code, but I can share the steps we take:

Configure ECC:
  DCAN ECC CS -> ECCMODE = 0x5
  DCAN ECC CS -> SBE_EVT_EN = 0xA
  DCAN CTL -> PMD = 0xA

Auto init RAM
  SYS MINITGCR -> MINITGENA = 0xA
  SYS MSINENA -> MSIENA = 0x100460
  wait for SYS_MSTCGSTAT -> = 0x1
  SYS MINITGCR -> MINITGENA = 0x5

get CAN RAM ECC Adress:
  data = 0xFFF7DC00 + (2 * 0x2) ( 0xFFF7DC00 for DCAN1)
  addr++

flip data bit
  DCAN CTL -> PMD = 0x5
  DCAN CTL -> Test = 0x1
  DCAN CTL -> Init = 0x1
  DCAN TEST -> RDA = 0x1
  DCAN ECCDIAG -> ECCDIAG = 0x5
  DCAN ECC CS -> SBE_EVT_EN = 0xA
  *data ^= 0x1
  DCAN CTL -> PMD = 0xA

read data and check error
  val = data
  DCAN ECCDIAG STAT -> SEFLG set?
  ESM set? (DCAN 1 would be 1.73 and in our case also 1.21)
 
Correct error...

We pretty much follow the implementation of the test in the SafeTI Library.

Are these the same steps you use?

Thank you and best regards,
Max

Hi Max,

Thanks for sharing the steps you followed, let me create issue at my end.

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Thanks & Regards,
Jagadish.

Hi Max,

There is one SDL Api to test CAN related ECC and parity things

The definition of this function is available in sl_selftest.c file

You can cross check your code once with the definition of this function code related to "CAN_ECC_TEST_MODE_1BIT" test type.

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Thanks & Regards,
Jagadish.

Hi Jagadish,

As mentioned in my previous post, we followed the implementation of the test that can be found in the SafeTi Library 2.4.0:
(boolean SL_SelfTest_CAN(SL_SelfTestType testType, SL_DCAN_Instance instance))

I compared our implementation with that implementation again and did not find a difference in the steps we take.

(Q) Does the 1 Bit ECC test only trigger a 1-Bit error on your end?

Thank you and best regards,
Max

Hi Max,

How are you checking the ECC flags (single bit and double bit error), are you checking in debug mode of project?

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Thanks & Regards,
Jagadish.

Hi Max,

I understood root cause for the issue.

This test should not be performed in debug mode because, the message RAM representation is different in debug/suspend mode and RDA Mode. Already in to perform this testing we are using RDA mode so if we perform test in debug mode the memory representation alters between two modes, so more RAM errors could generate (that includes both single bit error and double bit errors).

So, to perform this test without any issue i used SCI, i transmitted test status to the SCI after performing testing

The SCI output in my test code overall consists of 10 bytes, among them first 4 bytes are the word before doing corruption, and next 4 bytes are word after doing corruption and last two bytes are "ECC Diagnostic Status Register"

If two bytes are

00 01 - Single Bit Error

01 00 - Double Bit Error

01 01 - Single and double bit error

The below is the output i got when i perform single Bit error

The below is the output i got when i perform double bit error

You can change single- and double-bit errors at below line of the code

Here is the code, please go through it,

CAN_ECC_TEST_MODE_1BIT_LC43.zip

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Thanks & Regards.
Jagadish.

Hi Jagadish,

I compared your testfunction with our testfunction and could not find any difference in the way the test is setup and the error is triggered.
I also tried running the test without the debugger connected and get the same result. ESM 1.21 and 1.73 for 1bit failure injection test.

I will try to test some more, after I am back from my vacation.

If you have any ideas how we could debug this I would appreciate some tips.

Thank you and best regards,
Max

Hi Max,

Please verify my code again and test again.

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Thanks & Regards,
Jagadish.