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AM2432: SYSFW's watchdog timer

Hong Zhang
Intellectual 727 points
Part Number: AM2432

TRM chapter 4.2.3 lists the below watchdog timer related information. From the last sentence, it mentioned SYSFW image needs to be loaded to DMSC, and it will manage the watchdog timer during run time. A few question regarding this sentence:

1) For this watchdog timer maintained by SYSFW, is it still present after R5F core runs its appimage?
2) If this SYSFW's watchdog is still active during appimage's runtime, which WDT timer is used here? And what is the expiration time?   Who is patting the watchdog? And when it fires a watch dog reset, what is the behavior?

Thanks,

Hong 

  • 0
    TI__Mastermind 20037 points

    Hello Hong,

    We have assigned this thread to the designated SME. Please allow some time for review and follow up response.

    In the meantime, please review the related thread below for any relevant information.

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1075873/am6442-combined-tiboot3-bin-and-dmsc-watchdog/

    Best Regards,

    Zackary Fleenor

  • 0
    TI__Mastermind 20037 points

    Hello Hong,

    I have received an update from the SysFW team.

    1) This watchdog is petted by SYSFW image running on DMSC as long as the firmware is running.

    2a) MCU_WDT0 is used by DMSC SYSFW image.

    2b) Within the OSAL the watchdog is serviced in the following locations:

    1. A call to rti_wdt_pet happens in the OSAL idle thread. This ensures that the system does not experience a watchdog reset when no messages are being serviced. The idle thread will not execute if a task gets stuck as the idle thread only executes when no other is executing; if any thread is hung, it will block the idle thread and prevent servicing of the watchdog from here.

    2. A call to rti_wdt_pet happens at the end of each OSAL message processing task. This ensures that if a large number of messages come through the system equal to or faster than the rate at which they are processed the system does not experience a watchdog reset due to the idle thread being unable to run.

    2c) The expiration time is configured by ROM for 180 seconds. Not modified by SYSFW.

    2d) When WDT fires a reset, a DMSC Cold Reset (Device Level PORz Reset) is asserted.

    Additional Q/A's:

    >> Is this Firmware running from the moment of power on and entering DMSC BootROM? Or at what point does DMSC SysFW image begin execution?

     In ROM Combined boot flow, firmware starts execution when boot rom loads the DMSC firmware and releases reset.

    Refer to “4.7.5 Extended Boot Info Extension” chapter in TRM.

     

    >> -Can DMSC SysFW ever purposefully release MCU_WDT? No Expiration/No Pet (and free for use by other Initiators)

    No. It is always used.

     

    What should the customers next steps be (upon succesful SBL) if they wanted to use this MCU_WDT for their own application?

    This is not an option in current DMSC design.

    As long as DMSC is running it will continue to pet the WDT as explained above.

    Best Regards,

    Zackary Fleenor

  • 0 in reply to Fleenor
    Intellectual 727 points

    Hello Fleenor,

    Thanks a lot for the explanation. 

    Based on your explanation, if SBL successfully loads the SYSFW, but it fails to load the appimage to r5f core:  since DMSC is still running and petting the watchdog, it would not cause reset to let SBL to retry to load appimage, right?  In other words, my question is: does the DMSC WDT reset the MCU when SBL fails to load/run the appimage? 

    Thanks,

    Hong 

  • 0 in reply to Hong Zhang
    TI__Mastermind 20037 points

    Thank you for your patience here, I am still waiting for additional feedback from SME's.

    Best Regards,

    Zackary Fleenor

  • +1 in reply to Fleenor
    TI__Mastermind 20037 points

    Hello Hong,

    I know we've discussed this during our sync, but wanted to close here. As long as the DMSC RBL has been successfully loaded, the DMSC WDT will continue to be pet even if SBL load fails and thus will not issue a reset.

    Best Regards,

    Zackary Fleenor