AM2634: TMDSCNCD263

I think you can try the  CMSIS library to access the core registers: https://www.keil.arm.com/cmsis

I think CMSIS is not compatible with cortex R

My question already was based on CMSIS, the two functions I mentioned were from there.
 

In cortex R, what are the steps to change the interrupt priority during the runtime like the above 2 functions?

The system control register does not support that. No priority change.

Any updates on this?

Hello Abdelrhman,

I'm routing this query to our expert on the topic, but to start you can reference Section 10.2.1.5 VIM Interrupt Prioritization of the device TRM.

Best Regards,

Ralph Jacobi

Okay fine, I m waiting for the feedback.

Additional info:
Writing to the BASEPRI register allows setting any prio, writing BASEPRI_MAX only allows increasing the priority.

I need during the runtime to set a priority as X, any interrupt with a priority less than X shall not be served.

It is somehow like making a critical section, I guard a piece of code not to be interrupted unless an interrupt higher than the priority set (X) occurs, and then I lower the priority again.

The VIM Interrupt Prioritization is dealing with the interrupt priorities itself, not the system interrupt priority.

BASEPRI defines the minimum priority for exception processing. When BASEPRI is set to a non-zero value, it prevents the activation of all exceptions with the same or lower priority level as the BASEPRI value.

Thanks,
Yours

Any updates on this?

Hi Abdelrhman Afifi,

Yes we are looking into it and we will come back to you on this.

Best Regards,
Aakash

Can you please confirm that you want an interrupt mask feature wherein interrupt below a certain priority are masked and you want to do this dynamically, where in you want to achieve crtical section of code where you disable interrupt below certain priority for region of code and then restore the interrupt mask at end of the code region. 

If this is indeed your requirement there exists the following registers in AM64x/AM243x

Yes, this is exactly what I want to achieve, I will start to investigate these registers and see.

I could not find these registers in the documentation also.

I hope it will be a documentation issue.

Thanks for your support.

Hello,

what is the mapping between the VIM's priorities and the system interrupt priority?

The VIM's priorities are from 2:26 while the system priorities are from 0:15



Thanks

Hi Abdelrhman Afifi,

What do you mean by system interrupt priority ?

Best Regards,
Aakash

Hello Aakash Kedia,

The priorities are from 0 to 15 right?
But the VIM uses numbers greater than 15.

Yours,

Hello,

Is there a newer MCAL version to be released soon?

Yours,

Hi Abdelrhman Afifi,

It is planned for this week.

Best Regards,
Aakash

Hello Aakash,

Will the new MCAL include building SBL like the SDK or not?

Yours,