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AM2634: How to start two channels of EPWM waves at same time (Simultaneous activation of waves from both channels)

Prashanth Arun
Intellectual 255 points
Part Number: AM2634

Dear TI experts,

We want two channels of PWM starting Simultaneously without any delay.

In the below snapshot: EPWM 0 starts first then starts the EPWM 1 but our application needs both PWM waves starting at same time.

Can you please suggest us how to configure both EPWM0 and EPWM1 pulses to start simultaneously at same time without any delay.

  • 0
    TI__Expert 6995 points

    Hello Prashanth,

    Please use EPWM_CLKSYNC register to start the clock(Time Base clock TBCLK) of multiple EPWM instances simultaneously.

    Address is 0x502F 0010 which can be obtained from CSL_CONTROLSS_CTRL_U_BASE + CSL_CONTROLSS_CTRL_EPWM_CLKSYNC

    Please refer to SOC_setEpwmTbClk API for programming this register. 

    \mcu_plus_sdk\source\drivers\soc\am263x\soc.c (Note that SOC_setEpwmTbClk API starts the clock of EPWM instances one by one, not multiple instances simultaneously)

    For example:

    Program PWMs as follows,

    • Make  EPWM_CLKSYNC as 0. This disables TBCLK for all EPWMs
    • Make TBCTL[CTRMODE]= 3 in PWM1 and PWM2. This freezes the TBCTR (time base counters)
    • Write TBCTR=0 in PWM1 and PWM2. This initializes counters to 0
    • Configure PWM parameters, such as period, compare values.
    • Make TBCTL[CTRMODE]= 0 or 1 or 2 (depending on your use case) in PWM1 and PWM2. This starts the TBCTR (time base counters), and waits till clocks are enabled
    • Write EPWM_CLKSYNC with bit mask to enable required PWMs (2 bits for 2 EPWMs).  This enables TBCLK for the chosen EPWMs

    Observe the PWMs

    Please note that this is a one time synchronization of PWMs

    If the period (PWM frequency) is constant for the use case (no frequency modulation is required), then use above method of one-time synchronization of PWMs. If frequency modulation is required, the use EPWMxSYNCI, EPWMxSYNCO and TBPHS (sync in, sync out and phase shift) feature of EPWM.

    Thanks

    K.Sanjeev

  • 0 in reply to Sanjeev Karaiyan
    Intellectual 255 points

    Hi @, 

    I tried the above steps:

    SOC_setEpwmTbClk(0, FALSE);
    SOC_setEpwmGroup(0, 0);
    SOC_setEpwmTbClk(1, FALSE);
    SOC_setEpwmGroup(1, 0);

    /* Open drivers to open the UART driver for console */
    Drivers_open();
    Board_driversOpen();

    EPWM_setTimeBasePeriod(CONFIG_EPWM0_BASE_ADDR, 2500);
    EPWM_setTimeBasePeriod(CONFIG_EPWM1_BASE_ADDR, 10000);

    EPWM_setTimeBaseCounterMode(CONFIG_EPWM0_BASE_ADDR, EPWM_COUNTER_MODE_UP);
    EPWM_setTimeBaseCounterMode(CONFIG_EPWM1_BASE_ADDR, EPWM_COUNTER_MODE_UP);

    SOC_setEpwmTbClk(0, TRUE);
    SOC_setEpwmTbClk(1, TRUE);

    But after these although we saw shorter sync than before but we still see some 13 Micro sec delay:

    Please find complete project below:

    0312.adc_soc_software_am263x-cc_r5fss0-0_nortos_ti-arm-clang.zip

  • 0 in reply to Prashanth Arun
    Mastermind 8855 points

    You could try a software forced sync for the first period then move control to ZEROEN for automatic syncing:

  • 0 in reply to Kier
    Intellectual 255 points

    Hi Keir, 

    Tried Software force sync pulse as well, but still I am getting some 10 Micro sec out delay in the start of next channel.

  • 0 in reply to Prashanth Arun
    TI__Expert 6995 points

    Hello,

    Prashanth Arun said:
    SOC_setEpwmTbClk(0, TRUE);
    SOC_setEpwmTbClk(1, TRUE);

    Please replace these 2 lines with following

    HW_WR_REG32(CSL_CONTROLSS_CTRL_U_BASE + CSL_CONTROLSS_CTRL_EPWM_CLKSYNC, 0x00000003);

    Thanks

    K.Sanjeev