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AM2434: If any possible, reduce FSI registers read/write latency

Part Number: AM2434
Other Parts Discussed in Thread: TMS320F28386D

Hi there,

Our team is porting code from TMS320F28386D to AM2434. We need to apply FSI module to approach communication between chips. Surprisingly, it was found that the latency in reading from or writing to the register measured on the AM2434 chip is much greater than that measured on the TMS320F28386D chip:

Instruction latency \ Processor TMS320F28386D CPU AM2434 CPU AM2434 PRU
Read latency per register (us) 0.02 0.09 0.33
Write latency per register (us) 0.01 0.01 0.02

There are some conditions above:

  1. The latency cases on AM2434 CPU is measured by CycleCounterP timer and make sure of reading latency of CycleCounterP is eliminated. Additionally, build these testing code on TCM.
  2. The latency cases on AM2434 PRU is measured by "CT_PRU0_CTRL.CYCLE_COUNT_bit.CYCLECOUNT" and make sure of reading latency is eliminated.

It appears that the latency in reading from or writing to the register has become a bottleneck in the development of our application. Is there any other way to reduce the latency in reading from or writing to the register?

Any advice or suggestions would be greatly appreciated.

Sincerely,

Henry