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Tool/software:
Hello TI team,
Regarding the MCSPI configuration, we have a use case that SPI4 as controller to support multiple devices.
For Single Controller mode, we don't see the option to add multiple devices' chip select pin configuration.
Only when we selected Multi Controller in Mode Operation, it allows us to select multiple chip select.
But the SPI operation failed at a device ID read option once we switched to multi controller mode.
Could TI help to provide the proper sysconfig settings for the case to support multiple devices on SPI4?
Thanks,
Hong
Hi Hong,
Thanks for your questions and the patience over the past couple of days.
So "Single controller" option is expected to just have one peripheral interfaced to it, hence you would see just one CS option.
Whereas "Multi controller" option can be used to interface more than one Peripherals hence you would see multiple CS options can be added, lets say CS0, CS1, ...., CSn.
Now lets read through the datasheet which says the following about SPI4:
Based on your package type I would need you to select the correct ball pin number in the SysConfig window as highlighted below:
Post this step you have the correct configuration for CS lines with correct ball numbers for SPI4.
Now we need to look at the data out and data in lines. If your configuration looks like this:
It means that your SPI4_D0 will send data to the Peripherals and SPI4_D1 will receive data from the peripherals.
So this completes the basic understanding when it comes to SysConfig configuration.
One this note, I would like you to go through the following code snippet to understand how the communication should take place from MCU PLUS SDK point of view.
// to communicate with Peripheral sitting on CS0 write the following code MCSPI_Transaction_init(&spiTransaction); spiTransaction.channel = gConfigMcspi0ChCfg[0].chNum; spiTransaction.dataSize = your data size; // limited to 32 bits spiTransaction.csDisable = TRUE; // this makes sure to disable CS once the transfer has finished, hence have it as TRUE at first for sanity checking spiTransaction.count = some count value; spiTransaction.txBuf = your tx buffer; spiTransaction.rxBuf = your rx buffer; spiTransaction.args = NULL; transferOK = MCSPI_transfer(gMcspiHandle[CONFIG_MCSPI0], &spiTransaction); // to communicate with Peripheral sitting on CSn write the following code MCSPI_Transaction_init(&spiTransaction); spiTransaction.channel = gConfigMcspi0ChCfg[n].chNum;// notice the numbering changes here from 0 to n spiTransaction.dataSize = your data size; // limited to 32 bits spiTransaction.csDisable = TRUE; // this makes sure to disable CS once the transfer has finished, hence have it as TRUE at first for sanity checking spiTransaction.count = some count value; spiTransaction.txBuf = your tx buffer; spiTransaction.rxBuf = your rx buffer; spiTransaction.args = NULL; transferOK = MCSPI_transfer(gMcspiHandle[CONFIG_MCSPI0], &spiTransaction);
Hopefully the above should help you proceed ahead.
Looking forward to your response.
Regards,
Vaibhav
Hello Vaibhav,
Thanks a lot for the reply.
We will do some tests based on your suggestion and see how this works on our side.
Another question here, if we only have one CS enabled, can we still use "Multi controller" mode?
Thanks,
Hong
Hello Vaibhav,
We tried enabled the multi controller option again and are unable to read anything on that SPI channel.
When we change it to single, we can successfully read the 1st device on that SPI channel.
This is our MCSPI setup. We are using all the recommended pins for CLK, DI, DO, and CS
SPI0 - Single Controller
SPI1 - Single Controller
SPI2 - Single Peripheral
SPI4 - Multi Controller (doesn't work), Single Controller we can see the 1st peripheral.
Jeff
Hi Jeff,
The assigned expert is out of office today. Please expect response in few business days.
Regards,
Tushar
Hello Hong/Jeff,
I have looked at the code . In the code, CS line is not controlled by the driver if we configure SPI mode as multicontroller Mode.
So, users need to control the CS line before transferring/receiving data.
The name multicontroller is creating confusion. This method is called single controller and multiple peripherals connection.
In this case , users need to control CS lines before transferring/receiving data and the generated code and current driver does not support control of multiple peripherals support . Please try this method see if this works .
Please look at the image connection of controller and multiple Peripherals .
Regards,
Anil.
Thanks Anil,
The following API functions need the CS pin passed in.
Do we need to still pass the CS pin into these calls?
And for which of these functions do we need to assert the CS before calling?
MCSPI_setDataWidth
MCSPI_readChStatusReg
MCSPI_readRxDataReg
MCSPI_enableTxFIFO
MCSPI_enableRxFIFO
MCSPI_readChCtrlReg
MCSPI_writeChCtrlReg
MCSPI_readChConf
MCSPI_writeChConfReg
Jeff
Hello Jeff, Hong,
Another question here, if we only have one CS enabled, can we still use "Multi controller" mode?
Yes you can still use multi controller mode even if you have one cs enabled. I have mentioned this in my previous response as well. Please find it below.
Whereas "Multi controller" option can be used to interface more than one Peripherals hence you would see multiple CS options can be added, lets say CS0, CS1, ...., CSn.
Jeff, so I see that you have configured SPI4 to act as a master to more than one peripherals.
Can you share your code where you are defining mcspi transaction parameters for SPI4?
I will have to go through it before I comment further.
MCSPI_setDataWidth
MCSPI_readChStatusReg
MCSPI_readRxDataReg
MCSPI_enableTxFIFO
MCSPI_enableRxFIFO
MCSPI_readChCtrlReg
MCSPI_writeChCtrlReg
MCSPI_readChConf
MCSPI_writeChConfReg
Also you do not need to specify explicitly for these API calls as setting the right transaction parameters will do it for you.
Looking forward to your code.
Regards,
Vaibhav
Hello Vaibhav,
Could we possibly test this "Multi controller" mode on EVM?
Hong
Hi Hong,
Yes it is possible to test on the evm.
Also please go through this FAQ: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1414084/faq-sk-am64b-mcspi-integration-guide
I am sure it will help you out to a great extent.
Regards,
Vaibhav
Vaibhav,
Can you explain why, in multi controller mode, that the chip selects are defined in sysconfig when those pins are not controlled by the SDK in that mode?
Thanks
Jeff
Hello Jeff,
I have a AM64x SK EVM handy, I can try running an internal loopback example with multiple CS lines, I will try this with SPI0.
Please watch for updates on this thread.
Regards,
Vaibhav
Hello Jeff,
Okay so on this note, can you confirm me if you connect lets say one peripheral and try talking to the peripheral you are able to do so?
Just want to eliminate the probability of the Peripheral being defect here.
Also, if your answer is Yes, then I can provide you a piece of code to test out right away.
Regards,
Vaibhav
If we have it in single controller mode, we can talk to the chip. If we put it in multi mode and don't even define any more channels (so just the 1st one), we can no longer talk to it.
Hello Jeff,
Thanks for your patience.
If we have it in single controller mode, we can talk to the chip. If we put it in multi mode and don't even define any more channels (so just the 1st one), we can no longer talk to it.
I understand what you are trying to convey here. This means whenever the mode is set as multi channel mode, even with a single channel the driver seems to not work as its intended to be.
Just before I move forward, I am sure you must have gone through: C:\ti\mcu_plus_sdk_am243x_10_00_00_20\examples\drivers\mcspi\mcspi_loopback_multi_instances_multi_channels_lld. I know it is a loopback example, but just wanted to know if you have read through it.
I have also noticed that the chMode "MCSPI_CH_MODE_MULTI" is not mentioned or checked in the drivers at a lot of places, either for interrupt/polled mode of MCSPI operation. I have already asked the dev team on the status of this issue.
I will post the updates here itself if I hear back from the dev team before our meeting tomorrow.
Regards,
Vaibhav
I had not looked at it until now. I had tried to stay with SDK 9.0 since it uses a different sysconfig editor.
I've looked over the code and I don't see where the chip selects are used.
Something I just noticed, in the Ti example code, the function used to transfer data is MCSPI_lld_readWrite() and in our code, we are using MCSPI_writeTxDataReg(). In Ti's loopback example from 9.00, MCSPI_transfer() is used.
Hello Jeff,
I am doing a code drop now for you to test out the SPI driver functioning.
I want you to remove multiple testing in your application and just test out SPI with the given code below.
Take a simple empty R5F Nortos project in MCU PLUS SDK and replace the following content in main.c file.
/* * Copyright (C) 2018-2021 Texas Instruments Incorporated * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include <stdlib.h> #include "ti_drivers_config.h" #include "ti_board_config.h" void oracle_spi_test(void *args); int main(void) { System_init(); Board_init(); oracle_spi_test(NULL); Board_deinit(); System_deinit(); return 0; }
And the empty.c file should be replaced with the following code.
/* * Copyright (C) 2021 Texas Instruments Incorporated * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* This example demonstrates the McSPI RX and TX operation configured * in blocking, interrupt mode of operation. * * This example sends a known data in the TX mode of length APP_MCSPI_MSGSIZE * and then receives the same in RX mode. Internal pad level loopback mode * is enabled to receive data. * To enable internal pad level loopback mode, D0 pin is configured to both * TX Enable as well as RX input pin in the SYSCFG. * * When transfer is completed, TX and RX buffer data are compared. * If data is matched, test result is passed otherwise failed. */ #include <kernel/dpl/DebugP.h> #include "ti_drivers_config.h" #include "ti_drivers_open_close.h" #include "ti_board_open_close.h" #define APP_MCSPI_MSGSIZE (1U) uint32_t gMcspiTxBuffer[APP_MCSPI_MSGSIZE]; uint32_t gMcspiRxBuffer[APP_MCSPI_MSGSIZE]; void *oracle_spi_test(void *args) { uint32_t i, j; int32_t transferOK; MCSPI_Transaction spiTransaction; Drivers_open(); Board_driversOpen(); DebugP_log("[MCSPI] Oracle SPI Test started ...\r\n"); /* Memfill buffers */ for(i = 0U; i < APP_MCSPI_MSGSIZE; i++) { gMcspiTxBuffer[i] = 0x9F; // initializing tx buffer by writing 0x9F(data to be sent to Peripheral) gMcspiRxBuffer[i] = 0U; // setting rx buffer as empty to recieve the value 0xC2201C } /* Initiate transfer */ MCSPI_Transaction_init(&spiTransaction); spiTransaction.channel = gConfigMcspi0ChCfg[0].chNum; spiTransaction.dataSize = 32; spiTransaction.csDisable = TRUE; spiTransaction.count = 1; spiTransaction.txBuf = (void *)gMcspiTxBuffer; spiTransaction.rxBuf = (void *)gMcspiRxBuffer; spiTransaction.args = NULL; transferOK = MCSPI_transfer(gMcspiHandle[CONFIG_MCSPI0], &spiTransaction); if((SystemP_SUCCESS != transferOK) || (MCSPI_TRANSFER_COMPLETED != spiTransaction.status)) { DebugP_assert(FALSE); /* MCSPI transfer failed!! */ } else { /* Check if the data received is: 0xC2201C */ DebugP_log("Data in rx buffer is: %d\r\n", gMcspiRxBuffer[0]); } Board_driversClose(); Drivers_close(); return NULL; }
Make sure to add SysConfig SPI4 instance(Multi Controller) and CS0 line should be connected to the Peripheral which upon receiving 9F would give back 0xC2201C.
Please let me know if any further help is needed in build failures or in general.
Regards,
Vaibhav
Hi Merril,
The subject matter expert is currently out of office. Please expect delayed responses.
Regards,
Tushar