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Tool/software:
Hello.
Setting up ADC conversion with sys cfg.
No matter what time I put in the desired sample time, the total ADC conversion time - sample window + conversion window - never changes.
The way I am testing (approximate conversion) time is:
Even with sample time of 100 us, count only ever gets to one.
Note from manual:
10.2.13 Status Register
The ADC status register, STATUS, contains two bits – REFBUFRDY and BUSY.
• •
REFBUFRDY is set when the ADC receives the ready signal from the internal reference buffer (VREF/ REFBUF) after asserting the enable request
BUSY equaling ‘1’ indicates that the ADC is busy performing a sample or convert operation
Two snips from sys cfg attached.
Thanks.
Phil
Hi,
Can you share the configuration of ADC module on your project?
I tried on my side. I modified the sample time and the total conversion frequency changes accordingly as expected.
Best regards,
Cash Hao