TM4C1294NCPDT: TM4C1294NCPDT EPI EXTERNAL MEMORY WRITING PROBLEM

bala sund

Prodigy 230 points

Part Number: TM4C1294NCPDT

Tool/software:

Hi team

I am trying to store the firmware upgrade package in External RAM connected with controller using EPI0 module

I could access the external RAM memory and able to write the a single 32 byte data

but could not write multiple data continuously in for loop

can you please help me to review the code any changes to be made in it or any configuration need to be made

Please help me to sort this issue

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#if 1
//#pragma DATA_SECTION(my_sdram_data, "SDRAM") // Allocate variable to SDRAM section
//*****************************************************************************
//
// The stack size for the LED toggle task.
//
//*****************************************************************************
#define LEDTASKSTACKSIZE        128         // Stack size in words
#define PRIORITY_LED_TASK       1
//! - GPIO Port A peripheral (for EPI0 pins)
//! - GPIO Port B peripheral (for EPI0 pins)
//! - GPIO Port P peripheral (for EPI0 pins)
//! - GPIO Port C peripheral (for EPI0 pins)
//! - GPIO Port G peripheral (for EPI0 pins)
//! - GPIO Port H peripheral (for EPI0 pins)
//! - GPIO Port K peripheral (for EPI0 pins)
//! - GPIO Port L peripheral (for EPI0 pins)
//! - GPIO Port M peripheral (for EPI0 pins)
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

#if 1
//#pragma DATA_SECTION(my_sdram_data, "SDRAM") // Allocate variable to SDRAM section


//*****************************************************************************
//
// The stack size for the LED toggle task.
//
//*****************************************************************************
#define LEDTASKSTACKSIZE        128         // Stack size in words
#define PRIORITY_LED_TASK       1

//! - GPIO Port A peripheral (for EPI0 pins)
//! - GPIO Port B peripheral (for EPI0 pins)
//! - GPIO Port P peripheral (for EPI0 pins)
//! - GPIO Port C peripheral (for EPI0 pins)
//! - GPIO Port G peripheral (for EPI0 pins)
//! - GPIO Port H peripheral (for EPI0 pins)
//! - GPIO Port K peripheral (for EPI0 pins)
//! - GPIO Port L peripheral (for EPI0 pins)
//! - GPIO Port M peripheral (for EPI0 pins)

#define EPI_PORTA_PINS (GPIO_PIN_7 | GPIO_PIN_6)
#define EPI_PORTB_PINS (GPIO_PIN_3)
#define EPI_PORTC_PINS (GPIO_PIN_7 | GPIO_PIN_6 | GPIO_PIN_5 | GPIO_PIN_4)
#define EPI_PORTG_PINS (GPIO_PIN_1 | GPIO_PIN_0)
#define EPI_PORTH_PINS (GPIO_PIN_3 | GPIO_PIN_2 |GPIO_PIN_1 | GPIO_PIN_0)
#define EPI_PORTK_PINS (GPIO_PIN_5)
#define EPI_PORTL_PINS (GPIO_PIN_3 | GPIO_PIN_2 | GPIO_PIN_1 | GPIO_PIN_0)
#define EPI_PORTM_PINS (GPIO_PIN_3 | GPIO_PIN_2 | GPIO_PIN_1 | GPIO_PIN_0)
#define EPI_PORTP_PINS (GPIO_PIN_3 | GPIO_PIN_2)

//*****************************************************************************
//
// The starting and ending address for the  16Mb SDRAM chip (1Meg x 16bits) on
// the SDRAM daughter board.
//
//*****************************************************************************
/*
#define SDRAM_START_ADDRESS 0x000000
#define SDRAM_END_ADDRESS   0x7FFFFF
*/


#define SDRAM_START_ADDRESS 0x00000000
#define SDRAM_END_ADDRESS   0x01FFFFFF
#define NO_OF_RAM_LOC       4096

//*****************************************************************************
//
// The Mapping address space for the EPI SDRAM.
//
//*****************************************************************************
#define SDRAM_MAPPING_ADDRESS 0x60000000

//*****************************************************************************
//
// A pointer to the EPI memory aperture.  Note that g_pui16EPISdram is declared
// as volatile so the compiler should not optimize reads out of the image.
//
//*****************************************************************************
static volatile uint32_t *g_pui16EPISdram;

uint32_t sdramFreq = EPI_SDRAM_CORE_FREQ_50_100;



void intSdram( void )
{
    //
    // The EPI0 peripheral must be enabled for use.
    //
    SysCtlPeripheralEnable( SYSCTL_PERIPH_EPI0 );

    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOA );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOB );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOC );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOG );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOH );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOK );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOL );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOM );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOP );

    //
    // EPI0S4 ~ EPI0S7: C4 ~ 7
    //
    GPIOPinConfigure( GPIO_PC4_EPI0S7 );
    GPIOPinConfigure( GPIO_PC5_EPI0S6 );
    GPIOPinConfigure( GPIO_PC6_EPI0S5 );
    GPIOPinConfigure( GPIO_PC7_EPI0S4 );

    //
    // EPI0S00 ~ EPI0S03,  : H0 ~ 3
    //

    GPIOPinConfigure( GPIO_PH0_EPI0S0 );
    GPIOPinConfigure( GPIO_PH1_EPI0S1 );
    GPIOPinConfigure( GPIO_PH2_EPI0S2 );
    GPIOPinConfigure( GPIO_PH3_EPI0S3 );

    //
    // EPI0S8 ~ EPI0S9: A6 ~ 7
    //
    GPIOPinConfigure( GPIO_PA6_EPI0S8 );
    GPIOPinConfigure( GPIO_PA7_EPI0S9 );

    //EPI0S31:K5
    GPIOPinConfigure( GPIO_PK5_EPI0S31 );

    //
    // EPI0S10 ~ EPI0S11: G0 ~ 1
    //

    GPIOPinConfigure( GPIO_PG0_EPI0S11 );
    GPIOPinConfigure( GPIO_PG1_EPI0S10 );

    //
    // EPI0S12 ~ EPI0S15: M0 ~ 3
    //

    GPIOPinConfigure( GPIO_PM0_EPI0S15 );
    GPIOPinConfigure( GPIO_PM1_EPI0S14 );
    GPIOPinConfigure( GPIO_PM2_EPI0S13 );
    GPIOPinConfigure( GPIO_PM3_EPI0S12 );

    //
    // EPI0S16 ~ EPI0S19: L0 ~ 3
    //
    GPIOPinConfigure( GPIO_PL0_EPI0S16 );
    GPIOPinConfigure( GPIO_PL1_EPI0S17 );
    GPIOPinConfigure( GPIO_PL2_EPI0S18 );
    GPIOPinConfigure( GPIO_PL3_EPI0S19 );

    //
    // EPI0S28 : B3
    //

    GPIOPinConfigure( GPIO_PB3_EPI0S28 );

    //
    // EPI0S29 ~ EPI0S30: P2 ~ P3
    //
    GPIOPinConfigure( GPIO_PP2_EPI0S29 );
    GPIOPinConfigure( GPIO_PP3_EPI0S30 );

    //
    // Configure the GPIO pins for EPI mode.  All the EPI pins require 8mA
    // drive strength in push-pull operation.  This step also gives control of
    // pins to the EPI module.
    //
    GPIOPinTypeEPI( GPIO_PORTA_BASE, EPI_PORTA_PINS );
    GPIOPinTypeEPI( GPIO_PORTB_BASE, EPI_PORTB_PINS );
    GPIOPinTypeEPI( GPIO_PORTC_BASE, EPI_PORTC_PINS );
    GPIOPinTypeEPI( GPIO_PORTG_BASE, EPI_PORTG_PINS );
    GPIOPinTypeEPI( GPIO_PORTH_BASE, EPI_PORTH_PINS );
    GPIOPinTypeEPI( GPIO_PORTK_BASE, EPI_PORTK_PINS );
    GPIOPinTypeEPI( GPIO_PORTL_BASE, EPI_PORTL_PINS );
    GPIOPinTypeEPI( GPIO_PORTM_BASE, EPI_PORTM_PINS );
    GPIOPinTypeEPI( GPIO_PORTP_BASE, EPI_PORTP_PINS );

    uint32_t ui32SysClock = u32getSysClock();
    //
    // Is our current system clock faster than we can drive the SDRAM clock?
    //
    if ( ui32SysClock > 60000000 )
    {
        //
        // Yes. Set the EPI clock to half the system clock.
        //
        EPIDividerSet( EPI0_BASE, 1 );
    }
    else
    {
        //
        // With a system clock of 60MHz or lower, we can drive the SDRAM at
        // the same rate so set the divider to 0.
        //
        EPIDividerSet( EPI0_BASE, 0 );
    }

    //
    // Sets the usage mode of the EPI module.  For this example we will use
    // the SDRAM mode to talk to the external 64MB SDRAM daughter card.
    //
    EPIModeSet( EPI0_BASE, EPI_MODE_SDRAM );

    //
    // Configure the SDRAM mode.  We configure the SDRAM according to our core
    // clock frequency.  We will use the normal (or full power) operating
    // state which means we will not use the low power self-refresh state.
    // Set the SDRAM size to 64MB with a refresh interval of 1024 clock ticks.
    //
    EPIConfigSDRAMSet( EPI0_BASE, ( sdramFreq | EPI_SDRAM_FULL_POWER| EPI_SDRAM_SIZE_512MBIT | EPI_SDRAM_SIZE_128MBIT ), 1024 );

    //
    // Set the address map.  The EPI0 is mapped from 0x60000000 to 0x01FFFFFF.
    // For this example, we will start from a base address of 0x60000000 with
    // a size of 256MB.  Although our SDRAM is only 64MB, there is no 64MB
    // aperture option so we pick the next larger size.
    //

       /* EPIConfigHB16CSSet(EPI0_BASE, 0, (EPI_HB16_CSCFG_ALE_SINGLE_CS | EPI_HB16_ALE_HIGH | EPI_HB16_WRWAIT_0 |
                EPI_HB16_RDWAIT_0 | EPI_HB16_BSEL));

        EPIConfigHB16CSSet(EPI0_BASE, 1, (0x03000000 | EPI_HB16_ALE_HIGH | EPI_HB16_WRWAIT_0 |
                EPI_HB16_RDWAIT_0 | EPI_HB16_BSEL));

        EPIConfigHB16TimingSet(EPI0_BASE, 0, (EPI_HB16_WRWAIT_MINUS_DISABLE | EPI_HB16_RDWAIT_MINUS_DISABLE));
        EPIConfigHB16TimingSet(EPI0_BASE, 1, (EPI_HB16_WRWAIT_MINUS_DISABLE | EPI_HB16_RDWAIT_MINUS_DISABLE));
*/

    EPIAddressMapSet( EPI0_BASE, EPI_ADDR_RAM_SIZE_256MB | EPI_ADDR_RAM_BASE_6 );

    //
    // Wait for the SDRAM wake-up to complete by polling the SDRAM
    // initialization sequence bit.  This bit is true when the SDRAM interface
    // is going through the initialization and false when the SDRAM interface
    // it is not in a wake-up period.
    //
    while (HWREG(EPI0_BASE + EPI_O_STAT) & EPI_STAT_INITSEQ)
    {

    }


}



void Ram_vWriteByteData(uint8_t* u8ptr_Loc_Data,uint32_t u32_Loc_dataLength,uint32_t u32_Loc_flashAddress )
{
    uint32_t u32_Loc_dataCounter;
    int8_t j=0, i=0;
    uint32_t remaining_bytes=0;
    uint32_t ui32StartTime =0;
    uint32_t ui32EndTime =0;

    // Must erase the data first.  A write may only change a bit from 1 to 0, so if the
    //  bit is already zero, the write fails.  Erasing will set all bits to 1's.
    //  Calculate the number of 1KiB blocks that the data will span and erase that many.
//    uint32_t blockCount = ((u32_Loc_dataLength * sizeof(uint8_t)) / 1024) + 1;
//    Flash_Erase(u32_Loc_flashAddress,blockCount);

        intSdram();

       //
       // Set the EPI memory pointer to the base of EPI memory space.  Note that
       // g_pui16EPISdram is declared as volatile so the compiler should not
       // optimize reads out of the memory.  With this pointer, the memory space
       // is accessed like a simple array.
       //
       g_pui16EPISdram = RAMFMD;

       // Read the initial data in SDRAM, and display it on the console.
       //
       UARTprintf( "\n\r  @@@@@@@@@@@@@@@@@@SDRAM Initial Data:" );

    ui32StartTime = SysTickValueGet();
    // Write one word at a time
    for ( u32_Loc_dataCounter = 0; u32_Loc_dataCounter < u32_Loc_dataLength; u32_Loc_dataCounter+=4)
    {

        g_pui16EPISdram =0x0;
       //((u8ptr_Loc_Data + u32_Loc_dataCounter)- 0x30);

        // Set the data register.  This the word that will be written
        remaining_bytes = (u32_Loc_dataLength - u32_Loc_dataCounter);//get number of remaining bytes in data buffer


        if (remaining_bytes >= 4) //i will be refrencing index out of array range though
        {
            for(i=3;i>=0;i--)
            {

                (g_pui16EPISdram + u32_Loc_dataCounter) |=  (((volatile uint8_t*)u8ptr_Loc_Data)[u32_Loc_dataCounter+i]  ) << (i*8) ;

               //UARTprintf("First %x  u32_Loc_dataCounter %d \r\n", u8ptr_Loc_Data[u32_Loc_dataCounter+j], (u32_Loc_dataCounter+j));
            }
        }
        else
        {
            for(i=remaining_bytes;i>=0;i--)
            {
                /*sprintf(&Data, "%c",u8ptr_Loc_Data[u32_Loc_dataCounter+i]);*/
                (g_pui16EPISdram + u32_Loc_dataCounter) |=  (((volatile uint8_t*)u8ptr_Loc_Data)[u32_Loc_dataCounter+i]) << (i*8) ;

               // UARTprintf("Second %x  u32_Loc_dataCounter %d \r\n", u8ptr_Loc_Data[u32_Loc_dataCounter+j], (u32_Loc_dataCounter+j));
            }
        }


    }

          //
          // Get the End Count
          //
          ui32EndTime = SysTickValueGet();
}
#endif

PFA of the external RAM datasheet

42-45S16100H.pdf

2 months ago

0 Charles Tsai 2 months ago

TI__Guru**** 184426 points

Hi,

- Where is your RAMFMD mapped to?

- Why do you reset g_pui16EPISdram to 0 at line 264? g_pui16EPISdram is supposed to be a pointer to 0x60000000 if your RAMFMD is mapped to this address. You are supposed to write to 0x60000000 and 0x60000004 and so on but are you not writing to 0x0 instead? Unless you pass 0x60000000 for u8ptr_Loc_Data when you call Ram_vWriteByteData.

- Why don't you simplify your program and do some simple accesses to the SDRAM like in the TivaWare example. Can you get it to work? See below.

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    //
    // Set the EPI memory pointer to the base of EPI memory space.  Note that
    // g_pui16EPISdram is declared as volatile so the compiler should not
    // optimize reads out of the memory.  With this pointer, the memory space
    // is accessed like a simple array.
    //
    g_pui16EPISdram = (uint16_t *)0x60000000;
    //
    // Read the initial data in SDRAM, and display it on the console.
    //
    UARTprintf("  SDRAM Initial Data:\n");
    UARTprintf("     Mem[0x6000.0000] = 0x%4x\n",
               g_pui16EPISdram[SDRAM_START_ADDRESS]);
    UARTprintf("     Mem[0x6000.0001] = 0x%4x\n",
               g_pui16EPISdram[SDRAM_START_ADDRESS + 1]);
    UARTprintf("     Mem[0x603F.FFFE] = 0x%4x\n",
               g_pui16EPISdram[SDRAM_END_ADDRESS - 1]);
    UARTprintf("     Mem[0x603F.FFFF] = 0x%4x\n\n",
               g_pui16EPISdram[SDRAM_END_ADDRESS]);
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    //
    // Set the EPI memory pointer to the base of EPI memory space.  Note that
    // g_pui16EPISdram is declared as volatile so the compiler should not
    // optimize reads out of the memory.  With this pointer, the memory space
    // is accessed like a simple array.
    //
    g_pui16EPISdram = (uint16_t *)0x60000000;

    //
    // Read the initial data in SDRAM, and display it on the console.
    //
    UARTprintf("  SDRAM Initial Data:\n");
    UARTprintf("     Mem[0x6000.0000] = 0x%4x\n",
               g_pui16EPISdram[SDRAM_START_ADDRESS]);
    UARTprintf("     Mem[0x6000.0001] = 0x%4x\n",
               g_pui16EPISdram[SDRAM_START_ADDRESS + 1]);
    UARTprintf("     Mem[0x603F.FFFE] = 0x%4x\n",
               g_pui16EPISdram[SDRAM_END_ADDRESS - 1]);
    UARTprintf("     Mem[0x603F.FFFF] = 0x%4x\n\n",
               g_pui16EPISdram[SDRAM_END_ADDRESS]);

    //
    // Display what writes we are doing on the console.
    //
    UARTprintf("  SDRAM Write:\n");
    UARTprintf("     Mem[0x6000.0000] <- 0xabcd\n");
    UARTprintf("     Mem[0x6000.0001] <- 0x1234\n");
    UARTprintf("     Mem[0x603F.FFFE] <- 0xdcba\n");
    UARTprintf("     Mem[0x603F.FFFF] <- 0x4321\n\n");

    //
    // Write to the first 2 and last 2 address of the SDRAM card.  Since the
    // SDRAM card is word addressable, we will write words.
    //
    g_pui16EPISdram[SDRAM_START_ADDRESS] = 0xabcd;
    g_pui16EPISdram[SDRAM_START_ADDRESS + 1] = 0x1234;
    g_pui16EPISdram[SDRAM_END_ADDRESS - 1] = 0xdcba;
    g_pui16EPISdram[SDRAM_END_ADDRESS] = 0x4321;

    //
    // Read back the data you wrote, and display it on the console.
    //
    UARTprintf("  SDRAM Read:\n");
    UARTprintf("     Mem[0x6000.0000] = 0x%4x\n",
               g_pui16EPISdram[SDRAM_START_ADDRESS]);
    UARTprintf("     Mem[0x6000.0001] = 0x%4x\n",
               g_pui16EPISdram[SDRAM_START_ADDRESS + 1]);
    UARTprintf("     Mem[0x603F.FFFE] = 0x%4x\n",
               g_pui16EPISdram[SDRAM_END_ADDRESS - 1]);
    UARTprintf("     Mem[0x603F.FFFF] = 0x%4x\n\n",
               g_pui16EPISdram[SDRAM_END_ADDRESS]);

    //
    // Check the validity of the data.
    //
    if((g_pui16EPISdram[SDRAM_START_ADDRESS] == 0xabcd) &&
       (g_pui16EPISdram[SDRAM_START_ADDRESS + 1] == 0x1234) &&
       (g_pui16EPISdram[SDRAM_END_ADDRESS - 1] == 0xdcba) &&
       (g_pui16EPISdram[SDRAM_END_ADDRESS] == 0x4321))
    {
        //
        // Read and write operations were successful.  Return with no errors.
        //
        UARTprintf("Read and write to external SDRAM was successful!\n");
        return(0);
    }

- I will strongly suggest you use a logic analyzer to probe the IS42S16100H SDRAM chip inputs. The tool should provide tips if the signals are correct.

0 bala sund 2 months ago in reply to Charles Tsai

Prodigy 230 points

can you please share EPI burst write and read sample code

0 Charles Tsai 2 months ago in reply to bala sund

TI__Guru**** 184426 points

Have you looked at this reference design? https://www.ti.com/tool/TIDM-TM4C129XSDRAM

The SDRAM software example can be found at https://www.ti.com/tool/download/TIDCA22.

0 bala sund 2 months ago in reply to Charles Tsai

Prodigy 230 points

Hi charles

I tried the code shared with me,

It is working fine only when we directly assign the hardcoded value in the memory

but when i tried to assign a loop of 32 bit hex value over Ethernet it is always skipping 4 data
like below snippets

I also shared my code can you please help me check the code what is causing the issue for this skipping

PFB my code snippets

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// Define base addresses for the EPI registers
#define EPI_BASE        0x400D0000  // EPI base address
#define EPI_ADDR_0      0x60000000  // Example external address (could be an SRAM or Flash base)
uint32_t addr = 0x60000000;
// Define memory size
#define MEM_SIZE        1024
#define NUM_SDRAM_FREQ (sizeof(g_psSDRAMFreq) / sizeof(tSDRAMFreqMapping))
//*****************************************************************************
//
// The starting and ending address for the 64MB SDRAM chip (32Meg x 16bits) on
// the SDRAM daughter board.
//
//*****************************************************************************
#define SDRAM_START_ADDRESS 0x00000000
#define SDRAM_END_ADDRESS   0x01FFFFFF
#define NO_OF_RAM_LOC       4096
volatile uint32_t g_ui32InternalRamArray[NO_OF_RAM_LOC/4];
//*****************************************************************************
//
// The Mapping address space for the EPI SDRAM.
//
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

// Define base addresses for the EPI registers
#define EPI_BASE        0x400D0000  // EPI base address
#define EPI_ADDR_0      0x60000000  // Example external address (could be an SRAM or Flash base)
uint32_t addr = 0x60000000;
// Define memory size
#define MEM_SIZE        1024
#define NUM_SDRAM_FREQ (sizeof(g_psSDRAMFreq) / sizeof(tSDRAMFreqMapping))
//*****************************************************************************
//
// The starting and ending address for the 64MB SDRAM chip (32Meg x 16bits) on
// the SDRAM daughter board.
//
//*****************************************************************************
#define SDRAM_START_ADDRESS 0x00000000
#define SDRAM_END_ADDRESS   0x01FFFFFF
#define NO_OF_RAM_LOC       4096
volatile uint32_t g_ui32InternalRamArray[NO_OF_RAM_LOC/4];
//*****************************************************************************
//
// The Mapping address space for the EPI SDRAM.
//
//*****************************************************************************
#define SDRAM_MAPPING_ADDRESS 0x60000000

//*****************************************************************************
//
// The Max Count value for the SysTick Timer.
//
//*****************************************************************************
#define SYSTICK_MAX_COUNT   16777216


static volatile uint32_t *g_pui32EPISdram;
//*****************************************************************************
//
// A table used to determine the EPI clock frequency band in use.
//
//*****************************************************************************
typedef struct
{
    uint32_t ui32SysClock;
    uint32_t ui32FreqFlag;
}
tSDRAMFreqMapping;

static tSDRAMFreqMapping g_psSDRAMFreq[] =
{
    //
    // SysClock >= 100MHz, EPI clock >= 50Mhz (divided by 2)
    //
    {100000000, EPI_SDRAM_CORE_FREQ_50_100},

    //
    // SysClock >= 60MHz, EPI clock >= 30MHz (divided by 2)
    //
    {60000000, EPI_SDRAM_CORE_FREQ_50_100},

    //
    // SysClock >= 50MHz, EPI clock >= 50MHz (no divider)
    //
    {50000000, EPI_SDRAM_CORE_FREQ_50_100},

    //
    // SysClock >= 30MHz, EPI clock >= 30MHz (no divider)
    //
    {50000000, EPI_SDRAM_CORE_FREQ_30_50},

    //
    // SysClock >= 15MHz, EPI clock >= 15MHz (no divider)
    //
    {15000000, EPI_SDRAM_CORE_FREQ_15_30},

    //
    // SysClock < 15Mhz, EPI clock < 15Mhz (no divider)
    //
    {0, EPI_SDRAM_CORE_FREQ_0_15}
 };



//! - GPIO Port A peripheral (for EPI0 pins)
//! - GPIO Port B peripheral (for EPI0 pins)
//! - GPIO Port P peripheral (for EPI0 pins)
//! - GPIO Port C peripheral (for EPI0 pins)
//! - GPIO Port G peripheral (for EPI0 pins)
//! - GPIO Port H peripheral (for EPI0 pins)
//! - GPIO Port K peripheral (for EPI0 pins)
//! - GPIO Port L peripheral (for EPI0 pins)
//! - GPIO Port M peripheral (for EPI0 pins)

#define EPI_PORTA_PINS (GPIO_PIN_7 | GPIO_PIN_6)
#define EPI_PORTB_PINS (GPIO_PIN_3)
#define EPI_PORTC_PINS (GPIO_PIN_7 | GPIO_PIN_6 | GPIO_PIN_5 | GPIO_PIN_4)
#define EPI_PORTG_PINS (GPIO_PIN_1 | GPIO_PIN_0)
#define EPI_PORTH_PINS (GPIO_PIN_3 | GPIO_PIN_2 |GPIO_PIN_1 | GPIO_PIN_0)
#define EPI_PORTK_PINS (GPIO_PIN_5)
#define EPI_PORTL_PINS (GPIO_PIN_3 | GPIO_PIN_2 | GPIO_PIN_1 | GPIO_PIN_0)
#define EPI_PORTM_PINS (GPIO_PIN_3 | GPIO_PIN_2 | GPIO_PIN_1 | GPIO_PIN_0)
#define EPI_PORTP_PINS (GPIO_PIN_3 | GPIO_PIN_2)


//*****************************************************************************
//
// The Mapping address space for the EPI SDRAM.
//
//*****************************************************************************
#define SDRAM_MAPPING_ADDRESS 0x60000000



uint32_t sdramFreq = EPI_SDRAM_CORE_FREQ_50_100;


void Sdram_vWriteByteData(uint8_t* u8ptr_Loc_Data,uint32_t u32_Loc_dataLength, uint32_t* u32_data )
{
    uint32_t u32_Loc_dataCounter;
    int8_t j=0, i=0;
    uint32_t remaining_bytes=0;

    // Write one word at a time
        for ( u32_Loc_dataCounter = 0; u32_Loc_dataCounter < u32_Loc_dataLength; u32_Loc_dataCounter+=4)
        {

            // Set the data register.  This the word that will be written
            remaining_bytes = (u32_Loc_dataLength - u32_Loc_dataCounter);//get number of remaining bytes in data buffer

            if (remaining_bytes >= 4) //i will be refrencing index out of array range though
            {
                for(i=3;i>=0;i--)
                {

                    u32_data[u32_Loc_dataCounter] |=  (((volatile uint8_t*)u8ptr_Loc_Data)[u32_Loc_dataCounter+i]  ) << (i*8) ;

                }
            }
            else
            {
                for(i=remaining_bytes;i>=0;i--)
                {
                    /*sprintf(&Data, "%c",u8ptr_Loc_Data[u32_Loc_dataCounter+i]);*/
                    u32_data[u32_Loc_dataCounter] |=  (((volatile uint8_t*)u8ptr_Loc_Data)[u32_Loc_dataCounter+i]) << (i*8) ;

                   // UARTprintf("Second %x  u32_Loc_dataCounter %d \r\n", u8ptr_Loc_Data[u32_Loc_dataCounter+j], (u32_Loc_dataCounter+j));
                }
            }

           // UARTprintf("Buffer %x    u32_Loc_dataCounter %d \r\n",u32_data[u32_Loc_dataCounter], (u32_Loc_dataCounter+i));
        }

}



void intSdram( uint32_t ui32SysClock )
{

        uint32_t ui32Val, ui32Freq;


    //
    // The EPI0 peripheral must be enabled for use.
    //
    SysCtlPeripheralEnable( SYSCTL_PERIPH_EPI0 );

    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOA );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOB );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOC );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOG );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOH );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOK );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOL );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOM );
    SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOP );

    //
    // EPI0S4 ~ EPI0S7: C4 ~ 7
    //
    GPIOPinConfigure( GPIO_PC4_EPI0S7 );
    GPIOPinConfigure( GPIO_PC5_EPI0S6 );
    GPIOPinConfigure( GPIO_PC6_EPI0S5 );
    GPIOPinConfigure( GPIO_PC7_EPI0S4 );

    //
    // EPI0S00 ~ EPI0S03,  : H0 ~ 3
    //

    GPIOPinConfigure( GPIO_PH0_EPI0S0 );
    GPIOPinConfigure( GPIO_PH1_EPI0S1 );
    GPIOPinConfigure( GPIO_PH2_EPI0S2 );
    GPIOPinConfigure( GPIO_PH3_EPI0S3 );

    //
    // EPI0S8 ~ EPI0S9: A6 ~ 7
    //
    GPIOPinConfigure( GPIO_PA6_EPI0S8 );
    GPIOPinConfigure( GPIO_PA7_EPI0S9 );

    //EPI0S31:K5
    GPIOPinConfigure( GPIO_PK5_EPI0S31 );

    //
    // EPI0S10 ~ EPI0S11: G0 ~ 1
    //

    GPIOPinConfigure( GPIO_PG0_EPI0S11 );
    GPIOPinConfigure( GPIO_PG1_EPI0S10 );

    //
    // EPI0S12 ~ EPI0S15: M0 ~ 3
    //

    GPIOPinConfigure( GPIO_PM0_EPI0S15 );
    GPIOPinConfigure( GPIO_PM1_EPI0S14 );
    GPIOPinConfigure( GPIO_PM2_EPI0S13 );
    GPIOPinConfigure( GPIO_PM3_EPI0S12 );

    //
    // EPI0S16 ~ EPI0S19: L0 ~ 3
    //
    GPIOPinConfigure( GPIO_PL0_EPI0S16 );
    GPIOPinConfigure( GPIO_PL1_EPI0S17 );
    GPIOPinConfigure( GPIO_PL2_EPI0S18 );
    GPIOPinConfigure( GPIO_PL3_EPI0S19 );

    //
    // EPI0S28 : B3
    //

    GPIOPinConfigure( GPIO_PB3_EPI0S28 );

    //
    // EPI0S29 ~ EPI0S30: P2 ~ P3
    //
    GPIOPinConfigure( GPIO_PP2_EPI0S29 );
    GPIOPinConfigure( GPIO_PP3_EPI0S30 );

    //
    // Configure the GPIO pins for EPI mode.  All the EPI pins require 8mA
    // drive strength in push-pull operation.  This step also gives control of
    // pins to the EPI module.
    //
    GPIOPinTypeEPI( GPIO_PORTA_BASE, EPI_PORTA_PINS );
    GPIOPinTypeEPI( GPIO_PORTB_BASE, EPI_PORTB_PINS );
    GPIOPinTypeEPI( GPIO_PORTC_BASE, EPI_PORTC_PINS );
    GPIOPinTypeEPI( GPIO_PORTG_BASE, EPI_PORTG_PINS );
    GPIOPinTypeEPI( GPIO_PORTH_BASE, EPI_PORTH_PINS );
    GPIOPinTypeEPI( GPIO_PORTK_BASE, EPI_PORTK_PINS );
    GPIOPinTypeEPI( GPIO_PORTL_BASE, EPI_PORTL_PINS );
    GPIOPinTypeEPI( GPIO_PORTM_BASE, EPI_PORTM_PINS );
    GPIOPinTypeEPI( GPIO_PORTP_BASE, EPI_PORTP_PINS );


    //
    // Is our current system clock faster than we can drive the SDRAM clock?
    //
    if ( ui32SysClock > 60000000 )
    {

        //
        // Yes. Set the EPI clock to half the system clock.
        //
        EPIDividerSet( EPI0_BASE, 1 );
    }
    else
    {

        //
        // With a system clock of 60MHz or lower, we can drive the SDRAM at
        // the same rate so set the divider to 0.
        //
        EPIDividerSet( EPI0_BASE, 0 );
    }

    //
    // Sets the usage mode of the EPI module.  For this example we will use
    // the SDRAM mode to talk to the external 64MB SDRAM daughter card.
    //
    EPIModeSet( EPI0_BASE, EPI_MODE_SDRAM );


    //
        // Keep the compiler happy by setting a default value for the frequency
        // flag.
        //
        ui32Freq = g_psSDRAMFreq[NUM_SDRAM_FREQ - 1].ui32FreqFlag;

        //
        // Examine the system clock frequency to determine how to set the SDRAM
        // controller's frequency flag.
        //
        for(ui32Val = 0; ui32Val < NUM_SDRAM_FREQ; ui32Val++)
        {
            //
            // Is the system clock frequency above the break point in the table?
            //
            if(ui32SysClock >= g_psSDRAMFreq[ui32Val].ui32SysClock)
            {
                //
                // Yes - remember the frequency flag to use and exit the loop.
                //
                ui32Freq = g_psSDRAMFreq[ui32Val].ui32FreqFlag;
                break;
            }
        }
       // UARTprintf("ClockValuegreater %x  ui32Freq  %x\r\n",ui32SysClock, ui32Freq);


    //
    // Configure the SDRAM mode.  We configure the SDRAM according to our core
    // clock frequency.  We will use the normal (or full power) operating
    // state which means we will not use the low power self-refresh state.
    // Set the SDRAM size to 64MB with a refresh interval of 1024 clock ticks.
    //
    EPIConfigSDRAMSet( EPI0_BASE, (ui32Freq |EPI_SDRAM_FULL_POWER| EPI_SDRAM_SIZE_512MBIT ), 468 );

    //
    // Set the address map.  The EPI0 is mapped from 0x60000000 to 0x01FFFFFF.
    // For this example, we will start from a base address of 0x60000000 with
    // a size of 256MB.  Although our SDRAM is only 64MB, there is no 64MB
    // aperture option so we pick the next larger size.
    //
    EPIAddressMapSet( EPI0_BASE, EPI_ADDR_RAM_SIZE_256MB | EPI_ADDR_RAM_BASE_6);


    //
    // Wait for the SDRAM wake-up to complete by polling the SDRAM
    // initialization sequence bit.  This bit is true when the SDRAM interface
    // is going through the initialization and false when the SDRAM interface
    // it is not in a wake-up period.
    //
    while (HWREG(EPI0_BASE + EPI_O_STAT) & EPI_STAT_INITSEQ)
    {

    }
    
    
    EPIFlashProgram(uint8_t *pdata,uint32_t length)
{


         uint32_t ui32Index=0;
         uint32_t ui32StartTime, ui32EndTime=0;
         uint32_t ui32SysClockinMHz=0;
         uint32_t gui32SysClock=0;
         uint32_t SdramData[500]= {0};

         Sdram_vWriteByteData(pdata ,length, &SdramData);

         gui32SysClock = u32getSysClock();
         intSdram(gui32SysClock);


        // Set the EPI memory pointer to the base of EPI memory space.  Note that
        // g_pui16EPISdram is declared as volatile so the compiler should not
        // optimize reads out of the memory.  With this pointer, the memory space
        // is accessed like a simple array.
        //

        g_pui32EPISdram = (uint32_t *)0x60000000;



        //
        // Compute the System Frequency with the MHz field
        // adjusted for throughput calculation
        //
        ui32SysClockinMHz = gui32SysClock/1000000;

        //
        // Initialize SysTick Timer
        //
        SysTickPeriodSet(SYSTICK_MAX_COUNT);
        SysTickEnable();

        //
        // Get the Start Count
        //
        ui32StartTime = SysTickValueGet();

        //
        // Begin Writing a fixed pattern to external SDRAM
        //
        for(ui32Index=0;ui32Index<(NO_OF_RAM_LOC/4);ui32Index++)
        {
            g_pui32EPISdram[SDRAM_START_ADDRESS+ui32Index] = SdramData[ui32Index];

        }

        //
        // Get the End Count
        //
        ui32EndTime = SysTickValueGet();

        UARTprintf("32-bit SDRAM Write : %02d.%03d MBps\n",((4096*ui32SysClockinMHz)/(ui32StartTime-ui32EndTime)),
                ((4096*ui32SysClockinMHz)%(ui32StartTime-ui32EndTime)));



}






}

These are the value iam getting from ethernet but it is skipping while written external SDRAM

...

can you please look into this and help me to sort out the issue

0 bala sund 2 months ago in reply to bala sund

Prodigy 230 points

0 bala sund 2 months ago in reply to bala sund

Prodigy 230 points

8585.42-45S16100H.pdf

this is the external SDRAM part number

IS42S16100H
IS45S16100H

512K Words x 16 Bits x 2 Banks
16Mb SYNCHRONOUS DYNAMIC RAM

0 bala sund 2 months ago in reply to bala sund

Prodigy 230 points

but if we are directly assigning the sequential data like this

it is perfectly writing

I could not understand how it is happening can you please check and tell what is the problem when i writing a custom value to external SDRAM

0 Joe Josn 2 months ago in reply to bala sund

Expert 1245 points

Bala Sund, If you don't care about data endiness, just use memcpy((u8 *)SDRAM_MAPPING_ADDRESS, data, length).

I think you are trying to assemble u8[] data that you received to u32[] before wring to SDRAM, why?

If SDRAM interface is 32-bit access only OR you are trying to optimize writes why not assemble just one u32 at a time just before you do the write to SDRAM.

u32 *pDest = (u32 *)SDRAM_MAPPING_ADDRESS;

i32 iLen = (i32) (length/4);

while (iLen-- > 0)

{

u32 temp = *data++;

temp |= ((u32) *data++) << 8;

temp |= ((u32) *data++) << 16;

temp |= ((u32) *data++) << 24;

*pDest++ = temp;

}

You need to cast u8 to u32 before you left-shift - is the issue causing you loosing 3 out of 4 bytes in each loop.

Check your Sdram_vWriteByteData() method and how you use it. You are passing in a stack location (500 u32) as a dest. you are lucky that you are not overwriting your own stack which will crash your system. Currently you are writing junk to SDRAM since you are assembling u32 wrong AND reading the stack buffer beyond its limits (500 vs 1024)!

-Joe

0 bala sund 2 months ago in reply to Joe Josn

Prodigy 230 points

Hi Joe

Thanks for the support

I could able write the first 500 bytes of firmware binary but the problem it is looping in the memory like when i write first 500 bytes some how it writing in the next section like this how it is writing can you please help me with this issue It is like mirroring

...

and another issue is when i add this external ram to linker like this it is showing the error

#pragma DATA_SECTION(g_pui32EPISdram, ".sdram")

--retain=g_pfnVectors

/* The following command line options are set as part of the CCS project. */
/* If you are building using the command line, or for some reason want to */
/* define them here, you can uncomment and modify these lines as needed. */
/* If you are using CCS for building, it is probably better to make any such */
/* modifications in your CCS project and leave this file alone. */
/* */
/* --heap_size=0 */
/* --stack_size=256 */
/* --library=rtsv7M3_T_le_eabi.lib */

/* The starting address of the application. Normally the interrupt vectors */
/* must be located at the beginning of the application. */
#define APP_BASE 0x00000000
#define RAM_BASE 0x20000000
#define APP_LENGTH 0x010000000
#define EXSRAM_BASE 0x60000000

/* System memory map */

MEMORY
{
/* Application stored in and executes from internal flash */
FLASH (RX) : origin = APP_BASE, length = APP_LENGTH
/* Application uses internal RAM for data */
SRAM (RWX) : origin = RAM_BASE, length = 0x00040000

SDRAM (RWX) : origin = EXSRAM_BASE, length = 0x00040000

}

/* Section allocation in memory */

SECTIONS
{
.intvecs: > APP_BASE
.text : > FLASH
.const : > FLASH
.cinit : > FLASH
.pinit : > FLASH
.init_array : > FLASH

.vtable : > RAM_BASE
.data : > SRAM
.bss : > SRAM
.sysmem : > SRAM
.stack : > SRAM

.sdram : > EXSRAM_BASE

#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} load=FLASH, run=SRAM, table(BINIT)
#endif
#endif
}

iam getting the following error

No green play button visible with this error

but i loaded the gel file correctly only

please help me resolve this issue

The original requirement is to write the hex file to external RAM and need to boot from the external RAM

for this what i need to do in .cmd or linker file

......

0 bala sund 2 months ago in reply to bala sund

Prodigy 230 points

Hi Joe

When I write only first 500 bytes it is writing correctly and mirroring is happening like this

but when i write more than 500 bytes chunk by chunk
nothing is getting written only junk is there fully the memory is not getting updated

like below

please help where the issue will be

below is my code

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static uint16_t count =0;
void Sdram_vWriteByteData(uint8_t* u8ptr_Loc_Data,uint32_t u32_Loc_dataLength, uint32_t u32_data )
{
    uint32_t len = 0;
    len = (u32_Loc_dataLength/4);
    uint16_t datacount =0;
    g_pui32EPISdram = (g_pui32EPISdram + count);
    for(datacount=0; datacount < len; datacount++)
    {
     u32_data |=   ((uint32_t) *u8ptr_Loc_Data++) << 0;
     u32_data |=   ((uint32_t) *u8ptr_Loc_Data++) << 8;
     u32_data |=   ((uint32_t) *u8ptr_Loc_Data++) << 16;
     u32_data |=   ((uint32_t) *u8ptr_Loc_Data++) << 24;
     SysCtlDelay(20);
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

static uint16_t count =0;

void Sdram_vWriteByteData(uint8_t* u8ptr_Loc_Data,uint32_t u32_Loc_dataLength, uint32_t u32_data )
{

    uint32_t len = 0;
    len = (u32_Loc_dataLength/4);
    uint16_t datacount =0;
    g_pui32EPISdram = (g_pui32EPISdram + count);
    for(datacount=0; datacount < len; datacount++)
    {

     u32_data |=   ((uint32_t) *u8ptr_Loc_Data++) << 0;

     u32_data |=   ((uint32_t) *u8ptr_Loc_Data++) << 8;

     u32_data |=   ((uint32_t) *u8ptr_Loc_Data++) << 16;

     u32_data |=   ((uint32_t) *u8ptr_Loc_Data++) << 24;

     SysCtlDelay(20);
     *g_pui32EPISdram++ = u32_data;

     SysCtlDelay(40);
     UARTprintf("Data %x   RamAddress %x\r\n", u32_data, g_pui32EPISdram);
     u32_data = 0;
     count++;

    }

}

0 Charles Tsai 2 months ago in reply to bala sund

TI__Guru**** 184426 points

bala sund said:
ut if we are directly assigning the sequential data like this

it is perfectly writing

I could not understand how it is happening can you please check and tell what is the problem when i writing a custom value to external SDRAM

Glad to see this is working. Joe has very good tips on your type casting issues. Please note that the EPI is 16 bits, not 32 bits.

In your earlier code, you declare g_pui32EPISdram as a 32 bits integer pointer. Why don't you make g_pui32EPISdram a 16-bit pointer just like the example does and write to SDRAM 16-bit at a time.

0 bala sund 2 months ago in reply to Charles Tsai

Prodigy 230 points

Hi charles

I changed it still it writing junk only no correct data is not writing

0 bala sund 2 months ago in reply to bala sund

Prodigy 230 points

can you help to identify the issue here

#pragma DATA_SECTION(g_pui32EPISdram, ".sdram")

--retain=g_pfnVectors

/* System memory map */

SDRAM (RWX) : origin = EXSRAM_BASE, length = 0x00040000

}

/* Section allocation in memory */

SECTIONS
{
.intvecs: > APP_BASE
.text : > FLASH
.const : > FLASH
.cinit : > FLASH
.pinit : > FLASH
.init_array : > FLASH

.vtable : > RAM_BASE
.data : > SRAM
.bss : > SRAM
.sysmem : > SRAM
.stack : > SRAM

.sdram : > EXSRAM_BASE

#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} load=FLASH, run=SRAM, table(BINIT)
#endif
#endif
}

iam getting the following error

No green play button visible with this error

but i loaded the gel file correctly only

please help me resolve this issue

The original requirement is to write the hex file to external RAM and need to boot from the external RAM

for this what i need to do in .cmd or linker file

0 Charles Tsai 2 months ago in reply to bala sund

TI__Guru**** 184426 points

It is trying to open a GEL file. Your log is incomplete. You need to find that file in your file system.

First answer me if you can write to the SDRAM now before looking at your new problem as to execute code from SDRAM? Let's focus on one problem at a time.

Also refer to the below post which contains a .cmd file that will execute code out of SDRAM.

https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1401367/tm4c1299nczad-tm4c1299/5366218#5366218

0 bala sund 2 months ago in reply to Charles Tsai

Prodigy 230 points

Hi Charles

I could able to write the hex file in the ram

but it is not booting

can you help how to add this address to linker file to boot

below

#pragma DATA_SECTION(g_pui32EPISdram, ".sdram")

--retain=g_pfnVectors

/* System memory map */

SDRAM (RWX) : origin = EXSRAM_BASE, length = 0x00040000

}

/* Section allocation in memory */

SECTIONS
{
.intvecs: > APP_BASE
.text : > FLASH
.const : > FLASH
.cinit : > FLASH
.pinit : > FLASH
.init_array : > FLASH

.vtable : > RAM_BASE
.data : > SRAM
.bss : > SRAM
.sysmem : > SRAM
.stack : > SRAM

.sdram : > EXSRAM_BASE

#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} load=FLASH, run=SRAM, table(BINIT)
#endif
#endif
}

iam getting the following error

No green play button visible with this error

but i loaded the gel file correctly only

please help me resolve this issue

The original requirement is to write the hex file to external RAM and need to boot from the external RAM

for this what i need to do in .cmd or linker file

0 Charles Tsai 2 months ago in reply to bala sund

TI__Guru**** 184426 points

bala sund said:
I could able to write the hex file in the ram

Ok. Good to hear.

bala sund said:
No green play button visible with this error

but i loaded the gel file correctly only

The CortexM3_util.gel is normally at your CCS installation under ccs/ccs_base/emulation/gel. See below. The CCS seems to have problem finding the GEL files. Why are having the GEL files on your Desktop?

0 bala sund 2 months ago in reply to Charles Tsai

Prodigy 230 points

can you please tell how to include this variable stored in RAM to .cmd file

pragma DATA_SECTION(g_pui32EPISdram, ".sdram")

#define APP_BASE 0x00000000
#define RAM_BASE 0x20000000
#define APP_LENGTH 0x010000000
#define EXSRAM_BASE 0x60000000

/* System memory map */

SDRAM (RWX) : origin = EXSRAM_BASE, length = 0x00040000

}

/* Section allocation in memory */

SECTIONS
{
.intvecs: > APP_BASE
.text : > FLASH
.const : > FLASH
.cinit : > FLASH
.pinit : > FLASH
.init_array : > FLASH

.vtable : > RAM_BASE
.data : > SRAM
.bss : > SRAM
.sysmem : > SRAM
.stack : > SRAM

.sdram : > EXSRAM_BASE

#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} load=FLASH, run=SRAM, table(BINIT)
#endif
#endif
}

IS THE ABOVE METHOD IS CORRECT WAY TO ADD EXTERNAL SDRAM VARIABLE TO .CMD FILE
IF IT IS WRONG CAN YOU SUGGEST THE CORRECT WAY TO ADD THE VARIABLE IN .CMD FILE

0 Charles Tsai 2 months ago in reply to bala sund

TI__Guru**** 184426 points

First of all, is your GEL issue resolved?

bala sund said:
pragma DATA_SECTION(g_pui32EPISdram, ".sdram")

In which file do you have the above line for the .sdram section?

bala sund said:
#define APP_BASE 0x00000000
#define RAM_BASE 0x20000000
#define APP_LENGTH 0x010000000
#define EXSRAM_BASE 0x60000000

/* System memory map */

MEMORY
{
/* Application stored in and executes from internal flash */
FLASH (RX) : origin = APP_BASE, length = APP_LENGTH
/* Application uses internal RAM for data */
SRAM (RWX) : origin = RAM_BASE, length = 0x00040000

SDRAM (RWX) : origin = EXSRAM_BASE, length = 0x00040000

}

/* Section allocation in memory */

SECTIONS
{
.intvecs: > APP_BASE
.text : > FLASH
.const : > FLASH
.cinit : > FLASH
.pinit : > FLASH
.init_array : > FLASH

.vtable : > RAM_BASE
.data : > SRAM
.bss : > SRAM
.sysmem : > SRAM
.stack : > SRAM

.sdram : > EXSRAM_BASE

#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} load=FLASH, run=SRAM, table(BINIT)
#endif
#endif
}

It looks like you want the g_pui32EPISdram to be written to the SDRAM automatically during boot time. But if the EPI and SDRAM are not yet initialized, this won't work.

Have you checked this post I sent yesterday? https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1401367/tm4c1299nczad-tm4c1299/5366218#5366218. The poster initializes his EPI/SDRAM by calling drv_epinit() function before _c_init00 is entered to initialize the global variables. Why don't you take a look at this post. The poster also has the .cmd file.

void
ResetISR(void)
{
// Has to initialize EPI before _c_int00
// Otherwise will go to Hardfault directly
// Initialize the stack pointer
__set_MSP((uint32_t)&__STACK_END);

// Initialize the EPI and SDRAM
drv_epiInit();

//
// Jump to the CCS C initialization routine. This will enable the
// floating-point unit as well, so that does not need to be done here.
//
__asm(" .global _c_int00\n"
" b.w _c_int00");
}

Arm-based microcontrollers

Arm-based microcontrollers forum

TM4C1294NCPDT: TM4C1294NCPDT EPI EXTERNAL MEMORY WRITING PROBLEM