• State TI Thinks Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 2 answers
  • Subscribers 29 subscribers
  • Views 1473 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Double Bit SRAM ECC Error Insertion

Krishna Battu
Prodigy 70 points

Hi,

 

I am trying to insert a double bit error and expecting a DATA ABORT. I followed the below steps to introduce the double bit error.

1. Disable ECC in CPU

2. Disable ECC in RAM WRAPPER Congtrol Register

3. Set ECC Write Enable in control register.

4. Added 3 to the ECC value.

5. Enable ECC in RAM WRAPPER & Disable ECC Write Enable.

6. Enable ECC in CPU.

 

I did not observe the DATA Abort.

Please let me know that Is this the correct way to test or not.

 

Thanks & Regards

Krishna B

 

 

  • 0
    TI__Genius 13810 points

    Did you read back the data with the wrong ECC?

    Regards,

    Haixiao 

  • 0
    TI__Mastermind 23000 points

    Hi Krishna,

    Can you please confirm that you subsequently create a data access to the SRAM area you have modified?  This may be obvious, but it is necessary to generate a memory access to the affected area for the ECC to be evaluated.

     

    Regards,

    Karl

  • 0 in reply to KGreb
    Prodigy 70 points

    Hi,

     

    When i read back the ECC then i observed the DATA ABORT. I followed the below steps.

    1. Disable ECC in CPU

    2. Disable ECC in RAM WRAPPER Congtrol Register

    3. Set ECC Write Enable in control register.

    4. Changed the ECC value from 0x0C0C0C0C to 0x0A0A0A0A .

    5. Enable ECC in RAM WRAPPER & Disable ECC Write Enable.

    6. Enable ECC in CPU.

    7. Read the ECC then observed the DATA ABORT.

    Note: I am working on TCRAM.