Other Parts Discussed in Thread: TM4C123GH6PM
I am trying to test my SPI on my Tiva part and am probing the SPI pins. I notice that the FSS pin is erratically going high and low, though it does behave correctly for the period of interest. Also, my MISO line does not contain any data. I have the MOSI and MISO shorted on my chip and am running the following code, which has been adapted from TI's SPI code.
Suggestions on how to get SPI working correctly would be greatly appreciated.
#include <inc/tm4c123gh6pm.h>
#include <stdint.h>
#include <stdbool.h>
#include "types.h"
#include "main.h"
#include <inc/hw_memmap.h>
#include <inc/hw_types.h>
#include <driverlib/rom.h>
#include <driverlib/gpio.h>
#include <driverlib/pin_map.h>
#include <driverlib/sysctl.h>
#include <driverlib/systick.h>
#include <driverlib/timer.h>
#include <driverlib/ssi.h>
#include <inc/hw_ssi.h>
#include <inc/hw_gpio.h>
#include "driverlib/rom_map.h"
void main(void)
{
// Set System Clock to 80MHz
SysCtlClockSet(SYSCTL_SYSDIV_2_5 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ);
//Initializing Ports
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); //GPIO Port A: SSI0 to Accelerometer
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0); //SSI Peripheral
//SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD); //GPIO Port D
//SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); //GPIO Port F
//SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE); //GPIO Port E: LEDs
GPIOPinConfigure(GPIO_PA2_SSI0CLK); //SCLK
GPIOPinConfigure(GPIO_PA4_SSI0RX); //MOSI
GPIOPinConfigure(GPIO_PA5_SSI0TX); //MISO
GPIOPinConfigure(GPIO_PA3_SSI0FSS); //CS_BAR
GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5);
//GPIOPinTypeGPIOInput(GPIO_PORTD_BASE, GPIO_PIN_0); //INT1 and INT2
//GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_2); //CELL_TEST
//GPIOPinTypeGPIOInput(GPIO_PORTF_BASE, GPIO_PIN_0); //CELL_READ
//GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_4); //LED 1
//GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_5); //LED 2
//Enabling SSI port
SSIDisable(SSI0_BASE);
SSIClockSourceSet(SSI0_BASE, SSI_CLOCK_SYSTEM);
SSIConfigSetExpClk(SSI0_BASE, SysCtlClockGet(), SSI_FRF_NMW, SSI_MODE_MASTER, 5000000, 8);
SSIEnable(SSI0_BASE);
//Default States for Ports
//GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_2, LO); //Setting CELL_TEST low
unsigned int ulDataTx;
unsigned int ulDataRx;
//unsigned int ulindex;
while(SSIDataGetNonBlocking(SSI0_BASE, &ulDataRx))
{
}
ulDataTx = 5;
SSIDataPut(SSI0_BASE, ulDataTx);
while(SSIBusy(SSI0_BASE))
{
}
SSIDataGet(SSI0_BASE, &ulDataRx);
while(1)
{
while(SSIDataGetNonBlocking(SSI0_BASE, &ulDataRx))
{
}
ulDataTx = 5;
SSIDataPut(SSI0_BASE, ulDataTx);
while(SSIBusy(SSI0_BASE))
{
}
SSIDataGet(SSI0_BASE, &ulDataRx);
}
}
