RM44L520: HALCoGEn support for 3-wire SPI? (SISO pin)

Audun Knudsrod

Part Number: RM44L520
Other Parts Discussed in Thread: HALCOGEN

Hi, I am using HALCoGen to set up a project for an RM44 chip.

I will connect to a PLL from Analog Devices which uses a 3-wire SPI connection.
By 3-wire I mean CLK, DATA and CS.
However, the SPI driver from HALCoGen appears to wait for a read flag:

uint32 spiTransmitData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * srcbuff)
{
   /** Code skipped here for simplicity */

        /*SAFETYMCUSW 567 S MR:17.1,17.4 <APPROVED> "Pointer increment needed" */
        srcbuff++;
        /*SAFETYMCUSW 28 D MR:NA <APPROVED> "Hardware status bit read check" */
        while((spi->FLG & 0x00000100U) != 0x00000100U)
        {
        } /* Wait */
        SpiBuf = spi->BUF;

        blocksize--;
    }


    return (spi->FLG & 0xFFU);
}

From what I understand, the red code waits for the RXINTFLG to be set, which will never happen because it is using 3-wire.

Have I understood this correctly? If so, the HALCoGen drivers does not support 3-wire mode, which is a bit odd.

Is there a way around this?

over 8 years ago

0 QJ Wang over 8 years ago

TI__Guru**** 197036 points

Hello Audun,

Normally three-pin mode in our TRM means the CS (chip select) is not used. The SPI master provides the serial clock to the SPICLK pin. The data is transmitted on the SPISOMI pin, and received on the SPISOMI pin. All SPI devices should have at least 4 pins (CS, CLK, SIMO, SOMI).

If you don't use SOMI, and only write the data to SPI device, you need to modify the code generated by HALCoGen. But this kind of configuration is not common.

Regards,

0 Audun Knudsrod over 8 years ago in reply to QJ Wang

Intellectual 300 points

Hi, thanks for your reply.

Yes, I have noticed that TI's TRMs refers to SOMI/SIMO/CLK as *3 pin* mode. But *3-wire* mode is also a thing (SDIO, CS, CLK).
Analog Devices uses this design on multiple devices (PLLs, ADCs, DACs).
Wikipedia also states that this design is uncommon, but I keep seeing it being used.

0 Audun Knudsrod over 8 years ago in reply to QJ Wang

Intellectual 300 points

Follow-up question:

Are there any flags/bits which indicate that a transmission completed?
There are several flags/bits related to the state of the buffer (TXBUX), but I am looking for something that can be used to detect that a word has been completely transmitted.

Note: There appears to be some hardware support for half-duplex/3-wire mode, it's just halcogen that does not implement it.

0 QJ Wang over 8 years ago in reply to Audun Knudsrod

TI__Guru**** 197036 points

Hello Audun,

You can use TXINTFLG (9th bit of SPIFLG). This bit serves as an interrupt flag indicating that the transmit buffer (TXBUF) is empty (transmitted completely).

You can modify the code generated by HALCoGen for 3-wire (CS, SIMO, CLK) mode.

Regards,
QJ

0 Audun Knudsrod over 8 years ago in reply to QJ Wang

Intellectual 300 points

Hi.

I tried to observe this bit (TXINTFLG) during transmission, and it looks like it's always high.

I had some trouble interpreting the documentation on this bit, but your comment helps.
More specifically: Does this go high when TXBUF empties (is loaded into the shift register), or does it go high when content of the shift register has been shifted out on the serial line?

Half-duplex:
In the TRM, (document spnu608, chapter 25.2.17), there is a section on Half Duplex Mode.
This is exactly what I need, but there is a sentence I do not understand:
****
But this will require that both SOMI and SIMO lines are bonded out in a chip to be able to support
both TX-only or RX-only features.
****

What does it mean by "bonded out"? Does it mean that both pins still has to be physically connected to something on the outside of the MCU? If so, what?

Thank you for comments, this taking away a lot of uncertainty.

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RM44L520: HALCoGEn support for 3-wire SPI? (SISO pin)