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TMS570LC4357: TMS570LC43 Flash programming with TMDX570LC43HDK

Part Number: TMS570LC4357
Other Parts Discussed in Thread: TMDX570LC43HDK, HALCOGEN

I am just beginning to learn how to work with Hercules Safety Controllers. 

I am using Halcogen 04.07.01 and CCS 8.3.0.00009 and the evaluation board TMDX570LC43HDK

I was trying to follow the Flash Programming example that Christian Herget posted as an answer to another query on Flash Programming.

Reference: e2e.ti.com/.../577279

Since there was no .hcg file I could not really understand how to generate a project from scratch using Halcogen. 

Also the examples folder for TMS570LC43x in C:\ti\Hercules\HALCoGen\v04.07.01\examples\TMS570LC43x has a example_sys_cache.c but

the halcogen help browser doesn't include any description of that example.

So, I unzipped the LC43_Flash_Example.zip to a folde, created a CCS project and tried to debug it. 

Reference:  /cfs-file/__key/communityserver-discussions-components-files/312/4454.LC43-Flash-Example.zip

This however results in:

CortexR5: GEL Output: Memory Map Setup for Flash @ Address 0x0CortexR5: GEL Output: Memory Map Setup for Flash @ Address 0x0 due to System Reset
CortexR5: Loader: One or more sections of your program falls into a memory region that is not writable. These regions will not actually be written to the target. Check your linker configuration and/or memory map.
CortexR5: File Loader: Verification failed: Values at address 0xF0407FF0 do not match Please verify target memory and memory map.
CortexR5: GEL: File: E:\tms570_ccs_v8\Flash_LED_SCI1\Debug\Flash_LED_SCI1.out: a data verification error occurred, file load failed.
CortexR5: GEL Output: Memory Map Setup for Flash @ Address 0x0 due to System Reset

I did not modify anything in the HL_sys_link.cmd file that was in the .zip file.

Questions:

1. I think this project was tested on a different board than the HDK. I see:

<connection value="common/targetdb/connections/TIXDS2XXUSB_Connection.xml"/>

in the .ccsproject file.

Can this project run unmodified on the HDK? If not, what changes are required?

2. It's very hard to "reverse engineer" from the source what the halcogen settings are.   

I would like to reproduce this project from scratch using Halcogen. I understand the basic drivers enabled are RTI, GIO, SCI1, HET, SCI3.

However, I am lost in their configuration to match the LC43 Flash example project.

If one of our kind community members takes a look at the referenced project and help me with this, I would be very thankful for it.

3. The example_sys_cache.{c,h} are called HL_sys_cache.c and HL_sys_cache.h in the referenced project. 

Can these files be generated by halcogen? If so how? Functions such as coreCleanInvalidateDC() from the sys_cache.c file are called in sys_main

I also see that the sciReceiveBye call to assign 'a' or 'b' from the UART to thel "receive" variable is commented out on line 97 in sys_main.c

Why?

Thanks for all your help

Subu