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CCS/RM57L843: Double call of an interrupt handler after one interrupt event

Part Number: RM57L843
Other Parts Discussed in Thread: TMDXRM57LHDK

Tool/software: Code Composer Studio

Hello,

I got a double call of an interrupt handler after have resetting the source of the interrupt at the beginning of the handler.
4024.Double TO interrupts call.xlsxThere are 21 cpu cycles between the reset of the source of interrupt and the return from interrupt.

Where is the problem?

You will find the trace into the file attached.

What can I do?

Thanks for your help

Jerome

  • Hello Jerome,

    I am sorry I didn't get the point of your question. Is your question: double call or 21 cycles to exit the ISR?
  • Hi Wang,

    Thanks very much for your reply.

    Excuse me because my question was not clear.

    I wrote a Time Out handler with the following actions:

    1-      Reset of the source of interrupt

    2-      Compute the interrupt (11 cpu cycles)

    3-      Return to the main program

    But instead of returning to the main program the interrupt is launched again as if the cause of interrupt had not been cleared. If the time of computation exceed about 40 CPU cycles there is no problem.

    I would like to know if it’s possible to write a short interrupt handler (11 cpu cycle) without the repetition of call.

    I hope have been clearer.

    Thanks for your help

    Jerome

     

  • Excuse this mistake, it's 21 cpu cycles not 11 cpu cycles.
  • Thanks Jerome

    It looks like that clearing the interrupt flag (write 1 to flag register) takes longer than 21 cycles. What memory type (MPU) is used for peripheral (normal, device, or strongly-ordered)?
  • Hi Wang,

    Thanks for your fast reply.

    I work on 3 Texas Instruments development boards:

    RM48 USB Stick Development Kit (Cortex-R4F)

    Launchpad RM57LX

    TMDXRM57LHDK Dev Board 

    I suppose that the memory type (MPU) used for peripheral are correct devices.

    With the RM48 USB Stick Development Kit I did not need to add any delay in the Handler Interrupt.

    With the TMDXRM57LHDK Dev Board, after deeper analyze I need to add 35 cpu cycles to avoid repetition.

    With the T Launchpad RM57LX Dev Board, it’s different I need to add about 45 cpu cycles to avoid repetition.

    I have to add a temporization parameter to make the software available for the 3 products. It’s amazing no?

    Thanks for your help

    Jerome

  • Hi Jerome,

    When CPU writes to a register, there is some latency from the time the instruction is executed until the write is actually written to the register. Normally this is about 20 GCLK cycles.

    Can you add a dummy reading the status register to avoid the repetition?
  • Hello Wang,

    Yes, just a read of the status register is enough to fix the issue.

    Thanks very much for your help.

    Jerome