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HalCoGen 04.07.00, Pinmux

Lars Guenther
Intellectual 675 points
Other Parts Discussed in Thread: TMS570LC4357, HALCOGEN

Hi all,
I use the HalCoGen Version 04.07.00 with the TI Processor TMS570LC4357. I check the register values generated from HalCoGen and I have a question about the Pinmux module.

The follwing code line is generated by the HalCoGen Tool:

#define PINMUX_ETPWM_TIME_BASE_SYNC_ENABLE(state)       \
            (pinMuxReg->PINMUX[165] = (pinMuxReg->PINMUX[165] & PINMUX_ETPWM_TIME_BASE_SYNC_MASK) | (PINMUX_ETPWM_TIME_BASE_SYNC_##state))


But I think in the TI Reference Manual (spnu563.pdf, Version May 2014, table 6.3) this should set to PINMMR166.

Table 6.3:
ePWMx TBCLKSYNC Enable --> Register Adress offset 3A8h --> PINMMR166[1]

What is right ?


Best regards
Lars

  • 0
    TI__Guru**** 196776 points

    Hello,

    This is correct:

    ePWMx TBCLKSYNC Enable --> Register Adress offset 3A8h --> PINMMR166[1] 

    I will check the HalCoGen code. Thanks

  • 0 in reply to QJ Wang
    Intellectual 675 points

    Hi all,

    any News about the possible SW bug in HalCoGen ?

    Best regards

    Lars

  • 0 in reply to Lars Guenther
    TI__Guru**** 196776 points

    Hello Lar,

    The code generated through HALCoGen is correct.

    1. Synchronize all ePWMx modules to SYNCI

        SYNCI is from ePWM1SYNI or N2HET1_LOOP_SYNC. The PINMMR[25:24] is to select the sync signal.

        

    2. Synchronize all ePWMx modules to TBCLKSYNC

       This TBCLKSYNC is generated by a register bit in the I/O multiplexing module. PINMMR166[1] is the TBCLKSYNC signal. This bit is cleared (0) by default.

       PINMMR[166] is configured by calling 

       etpwmStartTBCLK();

    #define PINMUX_ETPWM_TIME_BASE_SYNC_ENABLE(state)       \
                (pinMuxReg->PINMUX[165] = (pinMuxReg->PINMUX[165] & PINMUX_ETPWM_TIME_BASE_SYNC_MASK) | (PINMUX_ETPWM_TIME_BASE_SYNC_##state))

    is for #1