- Ask a related questionWhat is a related question?A related question is a question created from another question. When the related question is created, it will be automatically linked to the original question.
Original question:
Hello all,
I am trying to understand the underlying mechanism of operation of the SECDED, implemented in the TMS570LS1224 (and related) MCU!
My question - is corrected data written back to Flash after correcting a single bit error?
I have been gathering information from various sources, but I want to make sure that I have understood correctly! From my understanding so far, single bit errors are only logged and flagged. The Flash is not reprogrammed with the corrected value automatically. To do so, one would need to use the Flash API to reprogram the Flash (which would require loading the API in RAM and so on...)
The sources I have used so far:
1) The SPNA126 ECCHandlinginTMSx70-BasedMicrocontrollers (
)
- Even though it is for the TMSx70-Based MCUs, it is super useful. The TMSx70-Based MCUs seem to also use the F021 Flash (like the TMS570LS1224) so the mechanisms should be similar.
2) E2E Thread: TMS570 - Error detection/correction mechanisms( ). Most important takes:TMS570 - Error detection/correction mechanisms - Arm-based microcontrollers forum - Arm-based microcontrollers...
Could you please help me to clarify/collect all the required information in order to handle the following correctable errors:
Group1 - 6 FMC - correctable error
- In general the ECC checking for memories on ATCM <-(this is the Flash) and BTCM is performed by the CPU itself. For ECC related errors, the CPU will log the error status and error address in its CP15 registers,i.e. data fault status register and data fault address register.
- You should read the error address and clear the flag so that subsequent errors can be recorded in the FMC or TCRAMW module. The error address registers are frozen from getting update if the error flags are not cleared.
- They also mention the CortexR4f Technical reference manual, section 8.4.3.
3) E2E Thread: TMS320F28377D: Executing a checksum on Flash Memory ( )TMS320F28377D: Executing a checksum on Flash Memory - C2000 microcontrollers forum - C2000™︎ microcontrollers...
Part Number: TMS320F28377D Hi, I am trying to do a checksum test on the Flash memory before calling the main function to check the flash integrity. I went through
- The only answer describes in short the SECDED mechanism, but doesn't say much more.
- It appears that errors are only logged.
4) C2000 Flash FAQ ()
- Even though it is for another MCU family, I found the source to be good, clear and concise!
- Question 9. Does SECDED logic correct the single bit error in Flash/OTP as well? Answer. No, it will give the corrected data to CPU but it will not correct the error in the Flash. User application has to erase and program the Flash if the error in the Flash has to be corrected.
5) SPNU515C, p. 114/2030 - The digital logic that interfaces the ARM Cortex-R4F CPU to the flash banks captures the ECC error events signaled by the CPU, and in turn generates error signals that are input to the central Error Signaling Module (ESM).
So to sum up, it seems that detected single bit errors are only corrected when reading from Flash, but they are not corrected by writing the corrected value back in Flash. Is this so?
Thank you in advance!
Kind regards,
Mihail
