TMS570LC4357: Testing the SECDED used in implicit reads

Hello Stephan,

This method is to test if the l2FMC SECDED works properly. 

As the device is coming out of the device reset sequence, the Flash wrapper reads a configuration word from the TI OTP section of bank 0. These are known as Implicit Reads. This is also readable from a bus master at address F008 0140h.

Good morning, QJ,

I'm sorry but the most interesting part of my question has got stuck somewhere after filling the forum's form.
You may wondered already about the incomplete question.

So my question is:
(Q1) Will an ESM 1.6 or 2.19 error arise if a bus master read of the 64 bits at 0xf0080140 leads to a correctable or a not-correctable bit error?

Thank you for your support!

Stephan

Dear QJ,

As i read your answer neither an ESM 1.6 nor an ESM 2.19 error will occur when a bus master read of the address 0xF0080140 is executed.

(Q2) If this is true, how can the signalising of bit errors during implicit reads via ESM be tested if ESM erors 1.6 and 2.19 cannot be stimulated?

I challenge the effectiveness of the procedure called in section 7.7.4
as in my understanding this test won't be sufficient to test the underlaying HW comprehensively:
The decision pass/fail is based on a SW-comparison of raw OTP bits and the OTP bits after SECDED.
That means that there are no HW-flags to be evaluated by SW during that procedure - maybe just because there is no HW-comparator.

I appreciate your efforts answering my questions!

Stephan

Hello Stephan,

Sorry for late response. I will do a test for implicit read on LC43x OTP.

Hi Stephan,

I did a quick test, and din't get ESM error either. I will check if I missed something in setup.