TMS570LS3137: How do Injection fault

Hello Whong,

SL_Init_ECCTCMRAM(..) is used to enable the RAM ECC.

The SRAM is protected by ECC. The ECC value is stored in the memory space starting at 0x08400000. The ECC of the data at 0x08000008 (64-bit aligned) is located at 0x08400008. For every 64-bit RAM data write, the CPU also writes 8-bit ECC is ECC RAM space. If any write access smaller than 64-bits, the CPU performs read-modify-write process: read 64-bit data, modify the specified bytes, write new data and new ECC back.

The ECC memory can also be directly accessed, but writing to the ECC space must also first be enabled via the RAM Control Register (RAMCTRL). 

The 1 bit ECC error can be achieved by flip 1 bit of ECC value.

The 2 bit ECC error can be achieved by flip 2 bit of ECC value.

The following steps are the procedure to inject 1-bit or 2-bit ECC error:

1. Enable writes to ECC RAM, enable ECC error response

    RAMCTRL = (0x1 << 8) | (0xA << 0);

2. Disable RAM ECC

3. Insert 1 bit ECC error by flip one bit (for example bit 0) of the value at 0x08400000 (or other address)

    or Insert 2 bit ECC error by flip two bit (for example bit 0 and bit 1) of the value at 0x08400000 (or other address)

    *(volatile uint32 *)(0x08400000U) ^ 0x01      ------- insert 1 bit ecc error

    or

    *(volatile uint32 *)(0x08400000U) ^ 0x03      ------- insert 2 bit ecc error

4. enable RAM ECC

5. Read data at 0x08000000 (it's ECC value is located at 0x08400000) to generate error

6. Check the ESM flags

Thank you

 Dose the code test the ecc function ？

retVal = SL_SelfTest_SRAM(SRAM_ECC_ERROR_FORCING_1BIT, TRUE, &failInfoTCMRAM);
INCREMENT_PASS_FAIL_COUNTER(failInfoTCMRAM, retVal);

/* Run 1Bit ECC error profiling test on TCM RAM */
retVal = SL_SelfTest_SRAM(SRAM_ECC_ERROR_PROFILING, TRUE, &failInfoTCMRAM);
INCREMENT_PASS_FAIL_COUNTER(failInfoTCMRAM, retVal);

retVal = SL_SelfTest_SRAM(SRAM_ECC_ERROR_FORCING_2BIT, TRUE, &failInfoTCMRAM);
INCREMENT_PASS_FAIL_COUNTER(failInfoTCMRAM, retVal);