• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 30 subscribers
  • Views 491 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS570LC4357-EP: CAN IF3 Update Enable Registers (IF3UEy) Behaviour (TMS570LC4357-EP)

subramanya a
Prodigy 60 points
Part Number: TMS570LC4357-EP
Other Parts Discussed in Thread: HALCOGEN

Dear sir,

I have working CAN driver for pooling and interrupt modes.

i'm trying to implement DMA functionality for CAN, from datasheet and TI forum I got to now that only RX DMA can be implemented for (TMS570LC4357-EP board) with the help of  IF3 interface register (IF3UEy).

But HALCOGEN has not generated any API/ functions to handle DMA, and even not utilized any IF3 registers in the driver code, but utilized IF1 and IF2 for Transmission and Reception purpose.

when i try to updating IF3UEy register with Rx message box number (from Table 27-33 ), after updating IF2 message box. Driver is not receiving the CAN data in pooling mode and interrupt mode,but transmission are working as expected. The registers NWDATx and IF2DATx  are always zero in-case of reception.

Below steps are followed for configuring the message box.  (same as Halcogen Code except 7th step).

  1. Checked for IF2STAT busy bit.
  2. Assigning vale for  IF2MSK
  3. Assigning vale for IF2ARB
  4. Assigning vale for  IF2MCTL
  5. Assigning vale for IF2CMD  = ((T_UINT8)( M_IFxCMD_WR |M_IFxCMD_MASK | M_IFxCMD_ARB | M_IFxCMD_CONTROL | M_IFxCMD_CLRINTPND));
  6. Assigning vale for IF2NO = 0x2UL
  7. Assigning vale for IF3UEy[0] = 0x2UL.(NEWLY ADDED)

Kindly let me know why IF3UEy register is creating issue for RX, so that i can continue DMA implementations. if there is any working CAN DMA example for TMS570LC4357-EP board, kindly share it for reference.

Thanks & Regards

Subramanya A

  • 0
    TI__Guru 72500 points

    When you enable IF3 for automatic reading of CAN Frame 2, The New Data bit is cleared by the transfer to the IF3 registers. Therefore there is no interrupt generated. You have only halfway enabled the DMA operation. You need to set the DE3 bit in the CAN control register and enable the DMA.

  • 0 in reply to Bob Crosby
    Prodigy 60 points

    Dear sir,

    Thanks for the replay, i have handled DE3 when ever DMA mode is enabled but kept IF3UEy register to update rx message box number even in the pooling and interrupt mode, because i was not keeping track for Rx message box number, which is used later to assign to IF3UEy register. 

    Now i'm using IF3UEy register only in DMA mode. i'm receiving data in IF3DATA register. No problem in reception | WORKING .

    i'm facing one more issue in DMA driver. when i set DMA register source and destination address, registers are not updated (remains zero).

    Below steps are followed (DMA driver from HALCOGEN):

    1. DMASetChannelDisable
    2. DMADisableChannelInterrupt
    3. DMAReqAssignToChannel
    4. DMASetChannelPriority
    5. DMAEnableChannelInterrupt
    6. CanDmaSetRxSourceDestAddr  
        1. Source address: (T_UINT32)pt_CAN1_port_reg->IF3DATx[M_ZERO])
        2. Destination address: global buffer.
        3. PORTASGN  is configured as PORTB_READ_PORTA_WRITE; /* peripheral to memory ; */
    7. DMASetChannelEnable

    Kindly let me know why i'm facing issue to set source and destination address. if there are any dependency to be handled kindly share.

     

    Thanks & Regard

    Subramanya A