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TMS570LC4357: MPU region configuration for CS2 area

Part Number: TMS570LC4357

Hi!

Which type in the MPU region shall be configured if an ansynchronous SRAM is connected to CS2? Device, strongly ordered or normal?

Thanks in advance for your answer!

Mathieu 

  • I have configured the IOMM for CS2, the CE2CFG in EMIF and CLK2CNTRL to divide the HCLK per four. I am performing with a debugger an access to the asynchronous SRAM at address 0x60000000. Unfortunately I cannot see on the logic analyser that the CS2 will get low. According to §21.4.2.2 in the user manual, CE2CFG is the only register to be configured. I need please a hint to find out my configuration error.

     

  • I suggest to use device mode or strongly-ordered mode. The MPU setting doesn't affect the nCS signal. Please also check the "EMIFclock out" and "EMIF out enable" in "Special Pin Muxing".