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Hello,
For a new project we will need to use the MibSPI (or SPI) of the TMS570LS1224, and at this moment we don’t know if our approach is correct. System features should be the following:
-FreeRtos.
-TMS570 is a slave. We will test it with another TMS570 working as master.
-5 Pin Mode.
-Variable size (received data and transmitted data).
From the slave point of view, the approach is the following:
-Vim channel 12 enabled (MIBSPI HIGH).
-MiBSPI1 Global: Master and internal disabled.
-Data format: Charlen 1 byte (minimum size).
-TG0: Buffer 4, Cs_0, Length ???? (bigger than the biggest packet?), one shot.
-Port:SOMI0 as output,SIMO0 as input, CLK as input, ENA as SPI and Output,CS0 as SPI and input, CS1234 GIO.
Code:
-Power on:
mibspiInit();
mibspiEnableGroupNotification(mibspiREG1, 0, 1);
-Notification.c ( RX_Data is char buffer, RX_SPI_flag is volatile)
void mibspiGroupNotification(mibspiBASE_t *mibspi, uint32 group)
{
mibspiGetData(mibspiREG1, group, RX_Data);
RX_SPI_Flag=1;
}
-In a task:
if(RX_SPI_Flag==1){
RX_SPI_Flag=0;
//to change size
mibspiREG1->TGCTRL[0] &= 0x7FFF0000;
mibspiREG1->TGCTRL[1] |= (SIZE-1) << 8;
mibspiSetData(mibspiREG1, 0, &TX_Data[0]); //copy data to TXRAM
mibspiTransfer(mibspiREG1, 0); //set TGENA bit to enable transfer
//Block? Maybe now I should change again the TG size to maximum, or use another TG
/* while(!(mibspiIsTransferComplete(mibspiREG1, 0)));
*/
}
From the master point of view, the approach is the following:
-MiBSPI1 Global: Master and internal enabled.
-Data format: Charlen 1 byte (minimum size).
-TG0: Buffer 4, Cs_0, length as desidedr, one shot.
-Port:SIMO0 as output,SOMI0 as input, CLK as output, ENA as SPI and Input,CS0 as SPI and output, CS1234 GIO.
Code:
-Power on:
mibspiInit();
-Task:
mibspiSetData(mibspiREG1,1,TG1_TX_DATA);
mibspiTransfer(mibspiREG1,1);
while(!(mibspiIsTransferComplete(mibspiREG1,1))); //block until ENA is activated?
mibspiGetData(mibspiREG1,1,TG1_RX_DATA);
Questions:
-Is the approach mostly correct?
-What should be the length of the transfer group to receive variable length?
-Will I receive an interrupt if the transfer group is not complete? At what moment? (CS HIGH?)
-Should I use two different TG for TX and RX? One with maximum length and the other with the desired length.
-Should I enable again the TG after change the size?
-From the master point of view, does the while block the system until ENA is activated?
Thanks in advance,
Aizkibel Salcedo
Hello,
Aizkibel Salcedo said:-Is the approach mostly correct?
QJ> I have a quick glance over your code, it looks fine to me.
Aizkibel Salcedo said:-What should be the length of the transfer group to receive variable length?
QJ>The length or charlen specifies the number of bits (2 to 16) in the data word. The CHARLEN directs the state control logic to count the number of bits received or transmitted to determine when a complete word is transferred. CHARLEN must be the same for both the master and the slave.
Aizkibel Salcedo said:-Will I receive an interrupt if the transfer group is not complete? At what moment? (CS HIGH?)
QJ>For MibSPI multi-buffered mode, there are 4 interrupts. One is TG completed interrupt. You may get TG suspend interrupt or RX overrun interrupt if the TG is not completed.
Aizkibel Salcedo said:-Should I use two different TG for TX and RX? One with maximum length and the other with the desired length.
QJ>No, The TG RAM contains 2 banks: one is for TXRAM and one is for RXRAM. The TG size is for both TX and RX.
Aizkibel Salcedo said:-Should I enable again the TG after change the size?
QJ> Yes.
Aizkibel Salcedo said:-From the master point of view, does the while block the system until ENA is activated?
QJ> yes.
HI QJ,
Thanks for your help, I start to programming everything and I have some problems:
Conf Slave (LaunchPad):
SOMI/[0]SIMO[0] as SPI, [1] as GPIO, CLK SPI as Input, ENA SPI As output,CS1-4 as GIO and CS0 as SPI. Everything with pull-ups.
TG:
Data format:
Global:
Driver MIBSPI1 is enabled. Irq is enabled:
PinMux is okey.
I'm sending the SPI with another board (1 byte@1MH)z. I check everything with the oscilloscope and it looks good (CS, MOSI,CLK). GND between boards is also connected.
Slave code:
_enable_interrupt_();
mibspiInit();
mibspiEnableGroupNotification(mibspiREG1, 0, 1);
The group notification is never reached. mibspi1HighLevelInterrupt is never triggered, however it is working because if I enable BITERR interrupt it latches the interruption(I don't know why if I'm not sending anything...).
Any idea? I'm using FreeRtos, I don't know if the group notifications are compatible with this SO, or what is happening here...
Thanks and best regards,
Aizkibel Salcedo
Hello Aizkibel,
Is the group 0 of the slave device enabled? Setting TGENA bit of TGxCTRL register will enable the required transfer groups x.
Hi QJ,
Thanks for the answer.
I tried to enable TGENA. If this bit is equal to 1, SOMI is always 0. If this bit is zero, SOMI is 1, however at any case interrupt is triggered.
Best regards,
Aizkibel
I finally found the problem, Group notification enabled level should be zero.
mibspiEnableGroupNotification(mibspiREG1, 0, 0);
Please QJ don't close the thread yet, probably I will have more doubts.
Thanks and best regards,
Aizkibel