TMS320F28388D: SPI Chip Select / Slave Transmit Enable (STE) pin

I designated a group of pins on CPU2 to be an SPI bus, specifically SPI-A, configuring one of those pins to be the Chip Select / Slave Transmit Enable.  Then if I send an 8-bit command to the slave device, the SPI device within CPU2 automatically lowers and raises Chip Select at the correct times, right?  I shouldn't have to explicitly lower and raise the Chip Select before and after sending the command, right?

I've implemented SPI peripheral interfaces with other microcontrollers and that's how they worked.  I've studied the relevant sections of the 5000++ page TMS320F28388D user manual and the 300+ page data sheet, and haven't found where they answer that question explicitly.  Timing diagrams and some text in the data sheet seem to indicate that, but as I said, not explicit.

Then I saw some example code that came with TI CCS and that code shows the author explicitly lowering and raising Chip Select.  Maybe that's because he/she wasn't using the dedicated GPIO pin for that device but was using a different pin, not sure about that.

I'm not currently in a position where I can put a scope on the signals and look, that's coming in the next several days, meanwhile I'm hoping someone here Just Knows... :-)

Thanks...