LAUNCHXL-F28379D: LAUNCHXL-F28379D: How to use CMPSS and Digital Compare Submodule event of ePWM Module?

Tool/software:

Dear Team.

When a waveform is input through the CMPIN1P pin using the CMPSS register, a reference voltage is applied to the CMPIN1N pin and compared to create a waveform that adjusts the EPWM duty according to the reference voltage.

We plan to receive input from the trip zone of the EPWM X-bar. After passing the signal from the digital compare module to the time-base submodule, we plan to use a method in which the duty is determined according to the cmpa value.

Currently, I am checking the waveform by giving input to CMPIN1P with a signal generator and applying a reference voltage to CMPIN1N with a power supply, but there is no output.

I hope to solve this issue.

There is my code.

// Compartor 1,2 initialization
EALLOW;
CpuSysRegs.PCLKCR14.all |= 1; // enable clock to CMPSS1
Cmpss1Regs.COMPCTL.bit.COMPLSOURCE = 0; // COMPCTL COMPLSOURCE 0 
Cmpss1Regs.COMPCTL.bit.COMPLINV = 1; // COMPCTL COMPLINV 1 
Cmpss1Regs.COMPCTL.bit.CTRIPLSEL = 0; //ASYNCL
EDIS;

// Pwm X-Bar initialization: CMPSS1.CTRIPL as TRIP4 input
EALLOW;
EPwmXbarRegs.TRIP4MUX0TO15CFG.all &= ~0x3UL; 
EPwmXbarRegs.TRIP4MUX0TO15CFG.all |= 0; // Set CMPSS1.CTRIPL as TRIP4 input
// 2,3bit 00
EPwmXbarRegs.TRIP4MUXENABLE.all |= 1; // enable that mux input
EDIS;

// Pwm X-Bar TRIP4: do not invert
EALLOW;
EPwmXbarRegs.TRIPOUTINV.all &= ~1UL; // do not invert
EDIS;

EALLOW;
EPwm1Regs.DCTRIPSEL.bit.DCAHCOMPSEL = 3; //TRIP4 Input
EPwm1Regs.TZDCSEL.bit.DCAEVT1 = 2; //DCAH = high, DCAL = don't care
EPwm1Regs.DCACTL.bit.EVT1SYNCE = 1; //SYNC Generation Enabled, Sync function enable
EPwm1Regs.DCACTL.bit.EVT1SRCSEL = 0; //0：Source Is DCAEVT1 Signal； 1：Source is DCEVTFILT Signal
EPwm1Regs.TZCTL.bit.DCAEVT1 = 3;
EDIS;

/* Filter
EPwm1Regs.DCFCTL.bit.PULSESEL = 1; //Time-base counter equal to zero
EPwm1Regs.DCFCTL.bit.BLANKINV = 0; //Blanking window not inverted
EPwm1Regs.DCFCTL.bit.BLANKE = 1; //Blanking window is enabled
EPwm1Regs.DCFCTL.bit.SRCSEL = 0; //Source is DCAEVT1 Signal
EPwm1Regs.DCFOFFSET = 810; //Blanking Window Offset 9us
EPwm1Regs.DCFWINDOW = 180; //Blanking Window Width 2us
*/

EALLOW;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = 0; // Shadow Mode
EPwm1Regs.CMPCTL.bit.LOADAMODE = 1; // Time-base counter equal to period (TBCTR = TBPRD)
EPwm1Regs.CMPCTL.bit.LOADASYNC = 2; // Shadow to Active Load of CMPA:CMPAHR occurs only when a SYNC is received
EPwm1Regs.CMPCTL.bit.SHDWAFULL = 1;
EDIS;

EPwm1Regs.CMPA.bit.CMPA = 720;

EPwm1Regs.AQCTLA.bit.CBU = AQ_SET;
EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR;

EALLOW;
GpioCtrlRegs.GPBMUX1.bit.GPIO42 = 3;
GpioCtrlRegs.GPBMUX1.bit.GPIO43 = 3;
GpioCtrlRegs.GPBGMUX1.bit.GPIO42 = 3;
GpioCtrlRegs.GPBGMUX1.bit.GPIO43 = 3;
EDIS;

//
// Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
//
DINT;

//
// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2837xD_PieCtrl.c file.
//
InitPieCtrl();

//
// Disable CPU interrupts and clear all CPU interrupt flags
//
IER = 0x0000;
IFR = 0x0000;

//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in F2837xD_DefaultIsr.c.
// This function is found in F2837xD_PieVect.c.
//
InitPieVectTable();

Sincerely,

Junyeong