TMS320F28030: TMS320F28030 and External Oscillator

Tool/software:

MCU: 
External crystal oscillator: 10MHz
The above combination is used and the PLL setting is (OSCCLK * 12)/4.
If there is a problem with the crystal oscillator and the frequency fluctuates, how will the PLL period be affected?
(1) The overall period of the PLL multiplication part will be extended
(2) The period of the final square wave of the PLL multiplication part will be extended
(3) Factors other than (1) and (2)

I received the following answer to this question.
JC:PLL should lock to the target frequency.  If the crystal oscillator frequency fluctuates, that issue has to be addressed first, 
Please check that the external crystal chosen meets the specs of the F2802x crystal specs below:

It is true that the correct crystal oscillator should be selected.

However, although I have currently selected an oscillator that matches the specifications,
error frames are occasionally occurring in CAN communication.(The clock period fluctuates.)
I would like to verify what the cause of the error frames is,
so I am investigating what would happen if the crystal oscillator frequency were to increase or decrease.
For this reason, I would like to know what effect the internal clock period would have when the above occurs, and so I am writing down the above three options.