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Tool/software:
Dear Experts,
CCS12.8.1
Compiler TI v22.6.2.LTS
I have a floating point variable declared as follows, in a CPU1 .c file:
#pragma DATA_SECTION(t,"ramls1_RAMCMD");
float32_t t;
where ramls1_RAMCMD is set as RAMLS1 in CMD, which is declared "CPU/CLA shared data memory" in MEMCFG.
When trying to compile the following CLA code:
extern float32_t t;
__interrupt void Cla1Task3 ( void )
{
t = 1.0f;
}
I get the following error:
"C:\Users\alon.g\AppData\Local\Temp\{0EC771BC-7449-406D-8A90-D7FD69504070}", ERROR! at line 419: [E0003] 16-bit register address not valid.
MMOV32 @t,MR0 ; [CPU_FPU] |89|
"C:\Users\alon.g\AppData\Local\Temp\{0EC771BC-7449-406D-8A90-D7FD69504070}", ERROR! at line 419: [E0003] Illegal register addressing operand
MMOV32 @t,MR0 ; [CPU_FPU] |89|
"C:\Users\alon.g\AppData\Local\Temp\{0EC771BC-7449-406D-8A90-D7FD69504070}", ERROR! at line 419: [E0004] Illegal operand combination
MMOV32 @t,MR0 ; [CPU_FPU] |89|
Errors in Source - Assembler Aborted
When t is defined as uint16_t or uint32_t, no such error occurs.
The following code where t is defined locally in the .CLA file also compiles OK:
float t;
__interrupt void Cla1Task3 ( void )
{
t=1.0f;
}
If I define TWO variables in the CPU1 .c file as follows:
#pragma DATA_SECTION(x,"ramls1_RAMCMD");
#pragma DATA_SECTION(t,"ramls1_RAMCMD");
float t;
float x;
then the following .cla code compiles OK:
extern float x;
__interrupt void Cla1Task3 ( void )
{
x = 1.0f;
}
The map file shows:
GLOBAL DATA SYMBOLS: SORTED BY DATA PAGE
address data page name
-------- ---------------- ----
00000400 10 (00000400) __stack
00008800 220 (00008800) V
00008802 220 (00008800) t
00008804 220 (00008800) x
Not only is there a bug, the error codes are not pointing to the allegedly problematic source line.
Thank You,
-Alon.
I am unable to reproduce the following behavior ...
When trying to compile the following CLA code:
extern float32_t t;
__interrupt void Cla1Task3 ( void )
{
t = 1.0f;
}I get the following error:
"C:\Users\alon.g\AppData\Local\Temp\{0EC771BC-7449-406D-8A90-D7FD69504070}", ERROR! at line 419: [E0003] 16-bit register address not valid.
MMOV32 @t,MR0 ; [CPU_FPU] |89|
"C:\Users\alon.g\AppData\Local\Temp\{0EC771BC-7449-406D-8A90-D7FD69504070}", ERROR! at line 419: [E0003] Illegal register addressing operand
MMOV32 @t,MR0 ; [CPU_FPU] |89|
"C:\Users\alon.g\AppData\Local\Temp\{0EC771BC-7449-406D-8A90-D7FD69504070}", ERROR! at line 419: [E0004] Illegal operand combination
MMOV32 @t,MR0 ; [CPU_FPU] |89|
Errors in Source - Assembler Aborted
I presume this is all the source code. I presume float32_t is float. Please show all the build options, exactly as cl2000 sees them. Please copy and paste the text, and do not use a screenshot.
Thanks and regards,
-George
Hello George
Thank you for your reply.
The project is a large project with several other CPU1 source code files. I am attaching the build flags and what I believe is the relevant part of the memory map.
Thank You,
-Alon.
-v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --tmu_support=tmu1 --vcu_support=vcrc -Ooff --opt_for_speed=5 --fp_mode=relaxed --include_path="C:/Users/alon.g/workspace_v12/v5" --include_path="C:/ti/c2000/C2000Ware_5_04_00_00" --include_path="C:/Users/alon.g/workspace_v12/v5/device" --include_path="C:/ti/c2000/C2000Ware_5_04_00_00/driverlib/f28p65x/driverlib" --include_path="C:/ti/ccs1281/ccs/tools/compiler/ti-cgt-c2000_22.6.1.LTS/include" --advice:performance=all --define=RAM --define=CPU1 --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --abi=eabi --cla_background_task=off --cla_signed_compare_workaround=on --asm_listing --include_path="C:/Users/alon.g/workspace_v12/v5/CPU1_RAM/syscfg"
MEMORY CONFIGURATION
name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
RAMM0_BEGIN 00000000 00000002 00000002 00000000 RWIX
RAMM0 000001b1 0000024f 000000fe 00000151 RWIX
RAMM1 00000400 00000400 000003f8 00000008 RWIX
CLATOCPURAM 00001480 00000080 00000000 00000080 RWIX
CPUTOCLARAM 00001500 00000080 00000000 00000080 RWIX
CLATODMARAM 00001680 00000080 00000000 00000080 RWIX
DMATOCLARAM 00001700 00000080 00000000 00000080 RWIX
RAMLS8_CLA 00004000 00002000 00000000 00002000 RWIX
RAMLS9_CLA 00006000 00002000 00000000 00002000 RWIX
RAMLS0 00008000 00000800 000001b4 0000064c RWIX
RAMLS1 00008800 00000800 00000065 0000079b RWIX
RAMLS2 00009000 00000800 00000000 00000800 RWIX
RAMLS3 00009800 00000800 00000000 00000800 RWIX
RAMLS4 0000a000 00000800 00000000 00000800 RWIX
RAMLS5 0000a800 00000800 00000527 000002d9 RWIX
RAMLS6 0000b000 00000800 00000000 00000800 RWIX
RAMLS7 0000b800 00000800 00000000 00000800 RWIX
RAMD0 0000c000 00002000 00002000 00000000 RWIX
RAMD1 0000e000 00002000 00001fd6 0000002a RWIX
RAMGS0 00010000 00002000 00000000 00002000 RWIX
RAMGS1 00012000 00002000 00000000 00002000 RWIX
RAMGS2 00014000 00002000 00000000 00002000 RWIX
RAMGS3 00016000 00002000 00000000 00002000 RWIX
RAMGS4 00018000 00002000 00000000 00002000 RWIX
RAMD2 0001a000 00002000 00000000 00002000 RWIX
RAMD3 0001c000 00002000 00000000 00002000 RWIX
RAMD4 0001e000 00002000 00000000 00002000 RWIX
RAMD5 00020000 00002000 00000000 00002000 RWIX
RAMLS8 00022000 00002000 00000000 00002000 RWIX
RAMLS9 00024000 00002000 00000000 00002000 RWIX
CPU1TOCPU2RAM 0003a000 00000800 00000000 00000800 RWIX
CPU2TOCPU1RAM 0003b000 00000800 00000000 00000800 RWIX
CANA_MSG_RAM 00049000 00000800 00000000 00000800 RWIX
CANB_MSG_RAM 0004b000 00000800 00000000 00000800 RWIX
FLASH_BANK0 00080000 00020000 00000000 00020000 RWIX
FLASH_BANK1 000a0000 00020000 00000000 00020000 RWIX
FLASH_BANK2 000c0000 00020000 00000000 00020000 RWIX
FLASH_BANK3 000e0000 00020000 00000000 00020000 RWIX
FLASH_BANK4 00100000 00020000 00000000 00020000 RWIX
RESET 003fffc0 00000002 00000000 00000002 RWIX
SECTION ALLOCATION MAP
output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
.reset 0 003fffc0 00000000 DSECT
codestart
* 0 00000000 00000002
00000000 00000002 f28p65x_codestartbranch.obj (codestart)
.TI.ramfunc
* 0 000001b1 00000004
000001b1 00000004 driverlib.lib : sysctl.obj (.TI.ramfunc)
.cinit 0 000001b6 000000fa
000001b6 000000c8 (.cinit..data.load) [load image, compression = lzss]
0000027e 00000006 (__TI_handler_table)
00000284 00000004 (.cinit..bss.1.load) [load image, compression = zero_init]
00000288 00000004 (.cinit..bss.2.load) [load image, compression = zero_init]
0000028c 00000004 (.cinit..scratchpad.1.load) [load image, compression = zero_init]
00000290 00000004 (.cinit..scratchpad.2.load) [load image, compression = zero_init]
00000294 00000004 (.cinit.ramls1_RAMCMD.load) [load image, compression = zero_init]
00000298 00000018 (__TI_cinit_table)
.stack 0 00000400 000003f8 UNINITIALIZED
00000400 000003f8 --HOLE--
.init_array
* 0 000001b1 00000000 UNINITIALIZED
.data 0 0000a800 00000145 UNINITIALIZED
0000a800 00000090 c2000ware_libraries.obj (.data:ePWM)
0000a890 0000002c control.obj (.data)
0000a8bc 00000004 adc.obj (.data)
0000a8c0 0000006a c2000ware_libraries.obj (.data)
0000a92a 00000008 ntc.obj (.data)
0000a932 00000006 v5.obj (.data)
0000a938 00000006 rts2800_fpu64_eabi.lib : exit.c.obj (.data)
0000a93e 00000002 : _lock.c.obj (.data:_lock)
0000a940 00000002 : _lock.c.obj (.data:_unlock)
0000a942 00000002 my_sci.obj (.data)
0000a944 00000001 SFO_v8_fpu_lib_build_c28_driverlib.lib : SFO_v8_fpu_lib_build_c28_driverlib.obj (.data)
ramls1_RAMCMD
* 0 00008800 0000001b UNINITIALIZED
00008800 00000016 adc.obj (ramls1_RAMCMD)
00008816 00000004 v5.obj (ramls1_RAMCMD)
0000881a 00000001 epwm.obj (ramls1_RAMCMD)
Cla1Prog 0 00008000 000001b4
00008000 00000114 v5_CLA_code.obj (Cla1Prog:Cla1Task1)
00008114 00000058 v5_CLA_code.obj (Cla1Prog:my_GPIO_writePin)
0000816c 00000038 v5_CLA_code.obj (Cla1Prog:HRPWM_setCounterCompareValue)
000081a4 00000008 v5_CLA_code.obj (Cla1Prog:Cla1Task2)
000081ac 00000008 v5_CLA_code.obj (Cla1Prog:Cla1Task3)
.const_cla
* 0 0000881c 00000040
0000881c 00000040 v5_CLA_code.obj (.const_cla:bitmap)
.scratchpad.1
* 0 0000885c 00000006 UNINITIALIZED
0000885c 00000006 v5_CLA_code.obj (.scratchpad:Cla1Prog:HRPWM_setCounterCompareValue)
.scratchpad.2
* 0 0000885c 0000000a UNINITIALIZED
0000885c 00000008 v5_CLA_code.obj (.scratchpad:Cla1Prog:my_GPIO_writePin)
00008864 00000002 v5_CLA_code.obj (.scratchpad:Cla1Prog:Cla1Task1)
Thank you for the build options. I can reproduce the same behavior. I filed EXT_EP-12238 to have this investigated. You are welcome to follow it with that link.
As workaround, rename the variable t to something else, like temp.
Thanks and regards,
-George