• State
  • Replies 5 replies
  • Subscribers 82 subscribers
  • Views 96 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

TMS320F28P650DK: Considerations when using software one-shot trip

Wayne Huang
Genius 15635 points
Part Number: TMS320F28P650DK

Tool/software:

Hi champs,

I am asking this for our customer.

The user wonders if there is any limitation/concern/consideration when using software one-shot trip of EPWM.

That is,

EPWMx.TZFRC.OST

EPWMx.TZCLR.OST

1)

For example, if a PWM period is 1 sec and this PWM is 100% duty on, and the user uses EPWMx.TZFRC.OST and then use to EPWMx.TZCLR.OST to trip it low and then clear alternatively every 1 ms.

Is it possible to have on and off and on and off like that?

2) As long as the user uses EPWMx.TZFRC.OST and then TZFLG.OST=1, it means the one-shot trip is effective until the user uses EPWMx.TZCLR.OST to clear TZFLG.OST. Is our understanding correct?

  • 0
    TI__Genius 9695 points

    Hi Wayne,

    Yes you can use one-shot trip to set the trip event and then clear the flag to clear the action applied that's possible.

    Although the TZFRC.OST will work only if EPWMCLKDIV is /1 as mentioned in thread here - https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1345272/tms320f28p650dk-unexpected-results-of-force-trip-action 

    Other option is to use T1/T2 action events generated from the Digital compare submodule and take actions based on the events

    Thanks

  • 0 in reply to Prarthan Bhatt
    TI__Genius 15635 points

    Hi Bhatt,

    That explains it.

    After setting EPWMCLKDIV = /1, we found our issue has been resolved.

    ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV = 0; // EPWMCLK = 200MHz /1 of PLLSYSCLK

    Questions:

    1) On F2837x, where SYSCLK = 200 MHz and EPWM = 100 MHz max . Is there also such an issue? EPWMCLK cannot be set /1 there.

    2) On F2838x, where SYSCLK = 200 MHz and EPWM = 200 MHz max. Is there also such an issue?

    3) On F28P65x, where SYSCLK = 200 MHz and EPWM = 200 MHz max, have we documented this in errata or TRM note? This is critical because many users would just use EPWMx.TZFRC.OST without realizing this issue.

    4) On F29H85x/P58x, where SYSCLK = 200 MHz and EPWM = 200 MHz max. Is there also such an issue?

  • 0 in reply to Wayne Huang
    TI__Genius 9695 points

    Hi Wayne,

    Yes this issue is applicable to all previous devices in /2 mode.

    We are in process of getting errata published for this issue.

    Thanks

  • 0 in reply to Prarthan Bhatt
    TI__Genius 15635 points

    Hi Bhatt,

    For F28P65x/F2838x/F29H85x/P58x, the user can use this workaround by setting EPWMCLK /1 mode.

    But for F2837x, which has /2 and should not be set as /1 because its EPWM is 100 MHz max there.

    In this case, this workaround cannot be used on F2837x and the user cannot use TZFRC.OST there? Is it true?

    The user can only use HW based trip method like CMPSS/GPIO.

    Is my understanding correct?

  • 0 in reply to Wayne Huang
    TI__Genius 9695 points

    Yes if CPUCLK is 200Mhz, then divide by /2 needs to be set for epwm in which case we would need software workaround.

    We are working towards the workaround to be published with errata

    Thanks