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nested interrupts of the same group

RH2248
Intellectual 290 points
Other Parts Discussed in Thread: TMS320F28035

Hi,

I'm using software modules for motor control on several C2000 CPUs for year now with a "standard" timing structure:

-high prio ISR (on ePWM1 interrupt) for motor control

-low prio ISR (done with counter in high prio ISR) for error handling

-main loop (for communication)

Now I added another ISR (on ePWM4 interrupt) in a certain project. This should be interrupted by the high speed ISR. Code goes like:

interrupt void epwm4_isr(void)
{
  // allow higher priority interrupts
  EINT;
 
  IER |= M_INT3;  // reenable this group (otherwise only done in HW after leaving this ISR!)

  // Acknowledge this interrupt to receive more interrupts from group 3
  PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;

  // a few line of actual code...

  foo();

  // Clear INT flag for this timer
  EPwm4Regs.ETCLR.bit.INT = 1;

}

 

This usually works, but sometimes (and of course not reproducible) my high prio epwm1 ISR gets into a timing overflow (this check is done with CPU timer 0). Is there something wrong with handling of the int flag in this case where two int sources of the same group are active?

Thank you,

Ralph

  • 0
    TI__Genius 15260 points

    Ralph,

    Take a look at pg 114-117 in this doc: http://www.ti.com/lit/ug/sprugl8b/sprugl8b.pdf

    This very thoroughly goes through the operation of the PIE and its interaction with the CPU.  If you have any additional questions afterwards please let me know.

    Kris

  • 0 in reply to Kris Parrent
    Intellectual 290 points

    Hi Kris,

    I know this section of this document (or at least I think so). By the way, the actual problem is with a 28234...

    Do you have any concrete hints on what could be wrong with the code snippet above? The new thing is the use of both epwm1 and epwm4 ISRs...

    Ralph

  • 0 in reply to RH2248
    TI__Genius 15260 points

    Ralph,

    The PIE / CPU procedure should be the same for both devices, but you can checkout the the one for your device for reference if you choose.  

    You said that you can't reproduce it, correct?  So how often does this happen?  When it happens, I would recommend tracing through the interrupt flags on shown on pg 114 of that document I linked to above.  This might help to determine if this is actually a PIE issue or if it's actually a flag not being set somewhere.

    In addition, I'm not sure the EINT and IER statements are necessary and may be causing some havoc unintentionally.  These will be automatically be restored and won't prevent any interrupts from being added to the queue while your ISR executes.

    Kris

  • 0
    Mastermind 7585 points

    Ralph,

    your code snippet looks correct. To setup a nested interrupt system you have to execute the EINT, IER and PIEACK instructions at the begining of the ISR. I use this type of interrupt nesting quite often, however in a different sequence:

    1.PIEACK

    2. IER

    3. EINT

    In your code, if you do EINT first, it could happen that other IER-enabled interrupts (like your low level ISR- you did not mention its origin) will sneak in. I'd suggest to change the order of the 3 instructions and test it again.

    Regards

     

     

     

  • 0 in reply to Frank Bormann
    Intellectual 255 points

    Hi Everyone,

    I working with TMS320F28035. I want to use the software nested interrupt between the two different groups of Interrupts.

    For example I am running INT1.1 from group 1(adcint at every 62.5microseconds) and INT3.1 from group 3(epwm1int at every 1ms). I made the ISR as following. As far as I checked it is working fine without enabling the real time mode. If I enable the real time mode all the register contents it showing BAD.

    Where its going wrong. Can anyone tell whether I am going in a wrong way.. Hoe to correct it if it is wrong..

    My isr code is shown below.

    interrupt void adc_isr(void)
    {
    GpioDataRegs.GPBDAT.bit.GPIO32 = 0;
    unsigned long i;
    for(i=0;i>=10000;i++);
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Must acknowledge the PIE group
    AdcRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; // Clear ADCINT1 flag
    }

    interrupt void epwm_isr(void)
    {
    GpioDataRegs.GPBDAT.bit.GPIO32 = 1;
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;

    IER |= M_INT3;

    EINT;

    DSP28x_usDelay(50000);

    EPwm1Regs.ETCLR.bit.INT = 1;


    }

    Thanks & Regards,

    Umesh T