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ezDSP F28335, XINT to external RAM, address bus pin layoutHi

richard payne
Genius 4640 points

In regard to schematic of SRAM (IS61LV6416/L) connection to F28335 for ezDSP F28335, I concern the way the address from F28335 connects to SRAM

XA0 to XA8  connect to A0 to A8 which is fine

XA9 connect to  A11

XA10 connect to A12

........

XA16 connect to A9

Is there reason for doing that?

Should I implement linear address from XA0 to XA16 to A0 to A16

  • 0
    Guru 192875 points

    Hi Ric,

    richard payne said:
    Is there reason for doing that?

    No reason as such. I'm not sure why they grounded A10 in the above ezdsp board!

    richard payne said:
    Should I implement linear address from XA0 to XA16 to A0 to A16

    Yes, that should not be an issue as the device (SRAM) datasheet clearly specifies them as address lines.

    Regards,

    Gautam

  • 0 in reply to Gautam Iyer
    Genius 4640 points
    Thank for quick reply,
    Is there exDSP guy who implement that project, do you have email I can pass message to?
    R.
  • 0 in reply to richard payne
    Guru 192875 points
    Sorry, no info on that! Btw its a Spectrum Digital's board; it would be better if you mail them.

    Regards,
    Gautam