TMS320F28377D: IEC60730 Class-B: Table H.1: 'Internal data path' and 'Internal data address' , where are the target blocks in the F28377D ?

Hello,

We would wait for your response.

Please tell me if our question doesn't make sense.

Sal,

I appreciate your response.

Can I confirm your reply, do you mean that the HWBIST, or STL_HWBIST_runFull() covers both the {5.1 and 5.2} ?

I'm looking into the Table-4 in the SW Safety Manual (SPRUIH0.pdf).

From the table I could not find the relationship between your word "HWBIST" and {5.1 Internal Data path – Data and 5.2 Internal Data path - Addressing}.

I'm a newbie, so maybe your word would be difficult for me.

I could understand that the three STLs {stl_flash, stl_march, stl_ram} covers the components {5.1 Internal Data path – Data and 5.2 Internal Data path - Addressing}.

Hi Hideaki,

You are correct. For 5.1 and 5.2, stl_ram, stl_flash, stl_march, and stl_pie_ram are designed to meet the component requirements.

STL_HWBIST is for component 1, which tests the C28x CPU. I was not sure which type of data path you were referring too.

Let me know if you have any other questions.

Thanks,

sal

Sal,

Can we ask TI about simplification from class-C to class-B?

For example, the part has ECC and parity logics, so it is expected to satisfy the class-B without stl_flash or stl_ram.

Is it wrong, or up to other implementations?