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Dear all,
We use EMIF to communicate with FPGA in Asynchronous mode, but the throughput is not enough. Does it make sense to use EMIF in synchronous mode to improve the throughput with FPGA?
Thanks.
Hi,
You can refer this appnote to see the throughput in different mode. In general there is not a big difference in throughput unless you increase the number of data lines.
Regards,
Vivek Singh