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TMS320F28388D: Hwi enter timing abnormal issue on C28x

Sheldon He
Expert 8585 points
Part Number: TMS320F28388D
Other Parts Discussed in Thread: SYSBIOS

Hi expert,

My customer is running SYSBIOS on C28x of F28388D device. They trigger ADC with EPWM SOC signal at fixed counter point. ADC EOC will trigger a Hwi thread to do some processing. In each time Hwi thread entered, they will read the EPWM current counter value to determine the enter time of this thread (delay from the SOC signal to Hwi enter). They find this time could vary from 2000 (normal) to 5000 (abnormal) which is unwanted for a real time application.

1. Does this method of measureing thread enter correct or have risks? Whill toggling a GPIO better solution here?

2. What will you recommend to solve this issue on customer board?

Thanks

Sheldon

  • 0
    TI__Prodigy 290 points

    Hi Sheldon,

    The numbers you have provided differ from the expected interrupt latency for C28X which can be found in the C28x large model Timing Benchmarks. Our benchloop example may provide more answers regarding an appropriate approach to measuring interrupt latency. It may be provided in the SYSBIOS product for your device but can be found in a few of our CoreSDKs (i.e. <CoreSDK version for CC32XX>/examples/rtos/<board>/sysbios/benchloop). The example configurations and output are specific to that device and will vary for C28X--but the approach should be helpful. 

    The C28X Hwi module also allows the user to configure "Zero Latency" interrupts. The documentation for the latest SYS/BIOS version (6.82.01.19) can be found here under "Minimal Latency Interrupts". For later versions, the SYS/BIOS product releases can be found here which links to its associated version of the API documentation.

    You could also consider using a GPIO toggle and measuring with a logic analyzer. Another option would be using the timer peripheral to do the timing.

    I hope this helps!

    Megan