MSP430F5437A: issue with system clock at higher temps

Hi Nicholas

What's the failure rate? 

For the failure, just the crystal become erratic? How do you get the erratic? What the clock bus sourced by the crystal?

Dose any different hardware version of MSP430F5437AIPNR ? Do them both version H?

The msp seems to get into a state where the failures occur. I don't know the statistics on how often it gets into that state or how to get it into that state.

Yes, just the XT1 clock appears to become erratic, the computational part of the msp seems fine. The crystal is on XT1, LF mode with 12.5pF net external caps set. XT1 drives ACLK and ACLK is used to drive timer A.

Hi Robert

So that means just the timer A is not work when the issue is happened, right? 

Nicholas Carley said:

This appears to be only an issue with units made after the middle of 2020

As Nicholas mentioned before, could you check if any changes before and after middle of 2020 in hardware?

I have more info about this problem:

1 Problem is with the external oscillator.

2. We found an undocumented feature of the msp430 that if LFXT1 goes into fault it replaces XT1 with an internal clock that runs at close to 32768Hz, close enough for serial port operation +-20,000ppm. This internal clock runs even if you use the XT1 In/Out pins as GPIO.

3. We looked at the clock waveform XT1Out when the problem occurs (higher temperatures) and it looks like a 32768Hz clock modulated by a triangleish shaped envelope with a period of 1.2ms. I tried to post the picture here but it didn't take the file. I can send it to you if you tell me where to send it.

4. Based on the triangular shape of the envelope I think the oscillator's slicer is getting confused and only sending bursts of clock cycles. You have to see the picture to get it.

5. We are able to change the shape of the envelope by varying the drive level, drive level0 has the smallest envelope (closest to normal).

5. We are thinking this is caused by some contamination and want to understand what could cause the oscillator to do this.

Robert

Here is the picture:

Robert Kavaler said:

Problem is with the external oscillator

Dose the external oscillator be changed after middle of 2020 in hardware?

Robert Kavaler said:

We found an undocumented feature of the msp430 that if LFXT1 goes into fault it replaces XT1 with an internal clock that runs at close to 32768Hz

We have mentioned it at user's guide 5.2.12

Could you show me the layout of the crystal please follow the layout of our demo board to make sure the trace as short as possible and be close to XT1 IN/OUT pin 

https://www.ti.com/tool/MSP-TS430PZ5X100 

or 

www.ti.com/.../MSP-EXP430F5438

The XT1IN trace is 0.15" and the XT1OUT trace is 0.25" traces are surrounded by grounds.

Sorry capture the wrong section in 5.2.12 the correct one should be below

One more comments here, have you try different crystal to do the test?

We tried two different crystals, both showed the issue. The issue has to do with contamination on our board. I just don't understand what contamination would cause this sort of problem.

One thing still concern me most is the question I have mentioned before

Gary Gao said:

could you check if any changes before and after middle of 2020 in hardware?

For the MSP430F5437A don't have new version at 2019 or 2020.So I don't think that is related with the MCU.

No intentional changes: same parts, same processes, same line. We think it is contamination but can you ask the designer of the oscillator what might cause the enveloped clock signal I show in the scope photo.

Robert:

Yes, the oscillator automatic fallback (from an external oscillator to an internal substitute) can be tricky; useful but tricky. In our medical device, we care a lot about the exact oscillator frequencies (both the high frequency oscillator and the low frequency oscillator) so we've written a fair amount of code that monitors and reacts to the various Oscillator Fault flags/interrupts. Note that it takes 250 ms of good oscillations for Osc Fault to clear for the low frequency oscillator.

Also, you can route SMCLK (~the high frequency clock) and ACLK (the low frequency clock) to pins that would otherwise be GPIOs and this lets you directly observe what the microprocessor is seeing for those two clocks, even as it switches clock sources. That gives you a way to externally observe the switchover among the clocks.

Atlant