MSP430F2618: SPI CLK not working after mapping to a different port

Hello,

I'm running a MSP430F2618 as SPI master. The application was working with UCB1 (on port 5), no problems. Requirement changes made it necessary to use a second SPI, so i ported my previously working code; SPI should now utilize UCA0 on port 3 (P3.5 SOMI, P3.4 SIMO, P3.0 CLK).

I've changed the defines of required pins, changed the P3SEL and changed every UCB1*** to UCA0***. With these changes, SPI is not working anymore. Oszilloscope showing the correct pattern for chip select / STE (done with P3OUT |= ..., so "manually"), but the CLK line is always high and doesn't move. MOSI/SIMO is outputting something, but the slave can't respond because of the missing clock signal.

I've tested the pin out, manually toggling the CLK pin is working normally, so hardware is still in tact.

Did I miss something?

Thanks and best regards,

Marius

#define DD_MISO    BIT5 //p3.5                       /**< port for SPI miso */
#define DD_MOSI    BIT4 //P3.4                        /**< port for SPI mosi */
#define DD_SCK     BIT0 //P3.0                         /**< port for SPI clock */
#define DD_SS      BIT3 //P3.3                        /**< port for SPI slave select */


static void spi_init(
    void
) {
    P3SEL |=  DD_MOSI + DD_MISO + DD_SCK;

    UCA0CTL1 |= UCSWRST;      // **Put state machine in reset**

    UCA0BR0 |= 0x00;  
    UCA0BR1 |= 0x00;

    UCA0CTL1 |= UCSSEL_2;
    UCA0CTL0 |= UCCKPH + UCMSB + UCMST ;   
    UCA0CTL1 &= ~UCSWRST;
}



// TX function
static uint8_t spi_txrx_char(
    char cData                                  /**< character to transmit */
) {
    UCA0TXBUF = cData;
    //while (!(IFG2 & UCA0RXIFG)); - this line was removed because no CLK => no answer from the slave
    unsigned char spi_rx = UCA0RXBUF;

    return(spi_rx);
}