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MSP430I2021: SD24 Input Range Limits

Benjamin Wadzinski
Prodigy 10 points
Part Number: MSP430I2021
Other Parts Discussed in Thread: TIDM-3OUTSMTSTRP, TIDM-TWOPHASEMETER-I2040

Hello,

 

I am working on a design that utilizes an MSP430I2021. In this design, an analog signal proportional to a temperature reading is connected to A0.0+ with respect to A0.0-. I am utilizing an external 1.25 Volt reference that is applied to VREF with respect to AVSS. The pins A0.0-, AVSS, and DVSS are all tied to the same node.

 

Note 2 in section 8.7.7.4 on page 22 of the datasheet for the MSP430I2021 indicates that the acceptable full-scale input range should be:

 

-0.8 * VREF / GAIN to 0.8 * VREF / GAIN

 

With a GAIN of 1 and a VREF of 1.25, this corresponds to an acceptable input range of -1 VDC to +1 VDC. Under normal operation, staying within this operating range will not be an issue. However, out-of-range temperatures and sensor failures could cause the potential on pin A0.0+ with respect to pins A0.0-, AVSS, and DVSS to drift outside of this range for an indefinite amount of time.

 

What are the positive and negative limits of the potential that can be applied to pin A0.0+ with respect to pins A0.0-, AVSS, and DVSS without damaging the MSP430I2021?

 

The datasheet referenced in this message is attached for convenience.

msp430i2021.pdf

  • 0
    Guru 22735 points

    Your answer is right there in 8.7.7.4: AVss-1 to AVcc.

  • 0 in reply to David Schultz
    Prodigy 10 points

    Hello David,

     

    The provided range of AVss-1 to AVcc seems to be contradicted by note 2 under section 8.7.7.4. This states that the full-scale range is given by:

     

    VFSR- = -VREF/GAIN

     

    Table 8.7.7.3 states that VFSR can be between 1 and 1.5 VDC. That seems to imply that the acceptable negative input limit can be as much as -1.5 VDC.

     

    Also, the provided TI reference designs do not seem to take strict precautions to prevent voltages outside of the AVss - 1 to AVcc range.

     

    Reference design TIDM-3OUTSMTSTRP includes a TVS diode that limits the input to ±9 VDC. A link to this reference design is below:

    https://www.ti.com/tool/TIDM-3OUTSMTSTRP

     

    Reference design TIDM-TWOPHASEMETER-I2040 includes a varistor to limit surges on the input. However, the selected varistor begins to clamp when the input to the MSP is roughly -1.16 VDC and this is not a strict limit. A link to this reference design is below:

    https://www.ti.com/tool/TIDM-TWOPHASEMETER-I2040

     

    These factors taken together indicate that the input voltage can be less than Avss-1 VDC.

  • 0 in reply to Benjamin Wadzinski
    Guru 22735 points

    VFSR is the range for the voltage difference between the two inputs. Quite a different thing from the common mode or absolute voltage.

    Exceed the differential voltage limit and the ADC is unhappy, most likely providing a full scale output count. Exceed the absolute limit and risk damage to the IC.

  • 0 in reply to David Schultz
    Prodigy 10 points

    Hello David,

     

    Thank you for pointing out that the Full Scale Voltage Range (VFSR) does not necessarily have to be the same as the absolute voltage.

     

    However, in both of the examples I referenced in my last post, the node connected to A0.0- is referenced to ground as shown below.

     

    TIDM-3OUTSMTSTRP:

     

     

    TIDM-TWOPHASEMETER-I2040:

     

     

     

    This means that, in these examples at least, VFSR and the absolute voltage are one and the same. As mentioned in my last post, I cannot perceive any strict precautions to prevent the application of input voltages that are outside of the recommended range. Are there elements of these designs that I am not understanding?

  • 0 in reply to Benjamin Wadzinski
    TI__Genius 10010 points

    Hi Benjamin,

    I'm not sure I follow your question here. VFSR and absolute voltage are different specifications. VSFR defines the max voltage the ADC can resolve. Absolute voltage max defines the max voltage the device can take before you risk damage. 

    What makes you say?:

    Benjamin Wadzinski said:
    in these examples at least, VFSR and the absolute voltage are one and the same

    Regards,

    Evan

  • 0 in reply to Benjamin Wadzinski
    Guru 22735 points

    The differential voltage and the absolute voltage on Ax+ are the same since Ax- is connected to AVcc. But the limits are different.

    The circuits shown have voltage dividers which limit the voltage. Assuming you operate them in the way intended, the full scale range of the ADC will not be exceeded. It would require failure of a couple of those 330K resistors to exceed the absolute voltage limits. Which is why you should substitute a single 1M resistor for them.

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