Hi team,
We’d like to use PVCC for powering ultrasonic sensor. If power line for the sensor changes, it will cause the error. So we’d like to have PVCC separated from DVCC and AVCC.
On the datasheet, below Recommended Operating Conditions table, it says [(1) TI recommends powering AVCC, DVCC, PVCC pins from the same source. At a minimum, during power up, power down, and device operation, the voltage difference among AVCC, DVCC, PVCC must not exceed the limits specified under Absolute Maximum Ratings. Exceeding the specified limits may cause malfunction of the device including erroneous writes to RAM and FRAM.].
The absolute max rating for Voltage difference between DVCC, AVCC, and PVCC is ±0.3V max. Does that mean it is OK to have PVCC separated from DVCC or AVCC, if the difference is less than ±0.3V? I’m asking because the note (1) below Recommended Operating Conditions table says “at a minimum”. Do we have other requirements for PVCC vs DVCC&AVCC ?
Also, we’d like to have PVCC as low as possible. But the note (2) says [USS module must be disabled if AVCC and DVCC are lower than 2.2 V.] So, the min voltage we can have for AVCC=DVCC=2.2V, with PVCC=1.9V. Is my understanding correct? How should we think of margin?
Best regards,
Kurumi