• State
  • Locked Locked
  • Replies 3 replies
  • Subscribers 78 subscribers
  • Views 191 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

MSP430FR6047: PVCC separated from DVCC and AVCC

Kurumi Hasegawa
Expert 6601 points
Part Number: MSP430FR6047

Hi team,

 

We’d like to use PVCC for powering ultrasonic sensor. If power line for the sensor changes, it will cause the error. So we’d like to have PVCC separated from DVCC and AVCC.

On the datasheet, below Recommended Operating Conditions table, it says [(1) TI recommends powering AVCC, DVCC, PVCC pins from the same source. At a minimum, during power up, power down, and device operation, the voltage difference among AVCC, DVCC, PVCC must not exceed the limits specified under Absolute Maximum Ratings. Exceeding the specified limits may cause malfunction of the device including erroneous writes to RAM and FRAM.].

The absolute max rating for Voltage difference between DVCC, AVCC, and PVCC is ±0.3V max. Does that mean it is OK to have PVCC separated from DVCC or AVCC, if the difference is less than ±0.3V? I’m asking because the note (1) below Recommended Operating Conditions table says “at a minimum”. Do we have other requirements for PVCC vs DVCC&AVCC ?

 

Also, we’d like to have PVCC as low as possible. But the note (2) says [USS module must be disabled if AVCC and DVCC are lower than 2.2 V.] So, the min voltage we can have for AVCC=DVCC=2.2V, with PVCC=1.9V. Is my understanding correct? How should we think of margin?

 

Best regards,

Kurumi

  • 0
    TI__Mastermind 32335 points

    Hi,

    You can use a separate source for PVCC. However, with a separate source for PVCC, the PVCC must follow the DVCC and AVCC at power up and power down process. That means if you power up the MCU through DVCC and AVCC, the PVCC must be applied at the same time. Otherwise, the difference on the PVCC and DVCC will be exceed the ±0.3V limits. 

    The USS module only works at 2.2V to 3.6V, a 1.9V on the PVCC is not working. 

    Best regards,

    Cash Hao

  • 0 in reply to Cash Hao11
    TI__Expert 6601 points

    Hi,

    Thank you for your reply. I understand PVCC requirements.

    As I mentioned, we are experiencing unexpected ultrasonic waveform drift with PVCC voltage change. However, the User's guide states that MSP430FR6047 has USS_LDO integrated. So PVCC voltage variation should not affect ultrasonic waveform as long as PVCC is within the operational voltage range (2.2V~3.6V). So, there must be another reason why ultrasonic wave changed, not PVCC. Is mu understanding correct? If so, would you please share possible cause? 

    Best regards,

    Kurumi

  • 0 in reply to Kurumi Hasegawa
    TI__Mastermind 32335 points

    Hi,

    Can you share the ultrasonic waveform drift with PVCC voltage change here? 

    The USS_LDO may not strong enough to cover the issue on the PVCC supply source. 

    Best regards,

    Cash Hao

**Attention** This is a public forum