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MSP430F2618: Processor clock setting problem.

Joe Casey
Prodigy 20 points

Part Number: MSP430F2618

Greetings.

I wish to use the low frequency crystal oscillator LFXT1 / ACLK as the source for main processor clock MCLK.

The processor defaults to Digitally controlled Oscillator DCO at start up,  and I will code the change to LFXT1 / ACLK.

But I am not able to set MCK to ACLK, and stays connected to DCO even though the family reference manual says it can be done.

I have studied the Basic Clock Module+ chapter and experimented with a variety of settings, but no luck.

Here are the settings I think should work.

Status Register SR = 0x004A

DCOCTL = 0x00

BCSCTL1 = 0x80

BCSCTL2 = 0xF6  (corrected since previous post)

BCSCTL3 = 0x0C

The register settings interact with each other, and I won't be surprised if I am overlooking something basic.

Help appreciated.

  • 0
    Guru 25405 points

    The bits for SELM and DIVM are in  BCSCTL2. You have chosen XT2 and divide by 8.

    I had to decode that because you didn't use the handy symbols defined in the header. What you want is SELM_3 | DIVM_0. Assuming you want divide by 1 and I can't think of any good reason to do otherwise. Actually, I can't think of a good reason to use XT1 for MCLK.

    The usual way to do things is to use the DCO for MCLK and spend most of the time in a low power mode. LPM3 for example. Wake up on an interrupt and do what is required before returning to the low power mode.

  • 0 in reply to David Schultz
    Prodigy 20 points

    Thank you David.

    Unfortunately a mistake in my post has wasted some of your time and mine,. 

    I had tried BCSCTL2 set to 0xF6 - MCLK sourced from ACLK and the divider doesn't matter for now.

    So that is SELM_3 (thanks for your tip about the header definition).

    I have just tried it again and DCO is still hogging the main clock.

    So my setup is:

    Status Register SR = 0x004A

    DCOCTL = 0x00

    BCSCTL1 = 0x80

    BCSCTL2 = 0xF6 

    BCSCTL3 = 0x0C

    According to my reading of the manual this should work, but doesn't.

    "Actually, I can't think of a good reason to use XT1 for MCLK."

    I don't HAVE to use LFXT1, and the DCO will provide the low energy performance I want at startup, but there is code in my application for a real time clock function with a watch crystal, and I would use that if I could.

    Regards.

    JC

  • +1 in reply to Joe Casey
    Guru 25405 points

    Keeping a real time clock using LPM3 is trivial so no need to source MCLK from from LFXT1.

    Have you read 5.2.7.1 of the guide on setting MCLK to be sourced from a crystal? Plus of course the preceding section on failsafe operation. Wherein it states that if OFIFG is set, MCLK will come from the DCO in spite of the SELM settings.

  • 0 in reply to David Schultz
    Prodigy 20 points

    OK. It's sorted now. The interactions between clock sources and  autonomous action in response to OFIFG were tripping me up.

    Thanks for your help.

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