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LP-MSP430FR2476: LP-MSP430FR2476_Internal clock output

Part Number: LP-MSP430FR2476
Other Parts Discussed in Thread: MSP-FET, MSP430FR2476

I would like to monitor the ACLK, SMCLK, and MCLK clocks using the sample code "cs_ex1_DCO1MHzSWTrim".
No clock waveform is output to the corresponding pins "P2.2", "P1.7", and "P1.3".

The code has been changed as shown below.

#include "driverlib.h"

//*****************************************************************************
//
//Target frequency for MCLK in kHz
//
//*****************************************************************************
#define CS_MCLK_DESIRED_FREQUENCY_IN_KHZ   1000

//*****************************************************************************
//
//MCLK/FLLRef Ratio
//
//*****************************************************************************
#define CS_MCLK_FLLREF_RATIO   30

//*****************************************************************************
//
//Variable to store current Clock values
//
//*****************************************************************************
uint32_t clockValue = 0;

#define GPIO_PORT_MCLK          GPIO_PORT_P1
#define GPIO_PIN_MCLK           GPIO_PIN3
#define GPIO_FUNCTION_MCLK      GPIO_PRIMARY_MODULE_FUNCTION
#define GPIO_PORT_SMCLK         GPIO_PORT_P1
#define GPIO_PIN_SMCLK          GPIO_PIN7
#define GPIO_FUNCTION_SMCLK     GPIO_PRIMARY_MODULE_FUNCTION
#define GPIO_PORT_ACLK          GPIO_PORT_P2
#define GPIO_PIN_ACLK           GPIO_PIN2
#define GPIO_FUNCTION_ACLK      GPIO_PRIMARY_MODULE_FUNCTION

//*****************************************************************************
//
//Variable to store status of Oscillator fault flags
//
//*****************************************************************************
uint16_t status;

void main (void)
{
    //Stop watchdog timer
    WDT_A_hold(WDT_A_BASE);

    GPIO_setAsOutputPin(
            GPIO_PORT_P5,
            GPIO_PIN0
            );

    //ACLK set out to pins
    GPIO_setAsPeripheralModuleFunctionOutputPin(
        GPIO_PORT_ACLK,
        GPIO_PIN_ACLK,
        GPIO_FUNCTION_ACLK
        );
    //SMCLK set out to pins
    GPIO_setAsPeripheralModuleFunctionOutputPin(
        GPIO_PORT_SMCLK,
        GPIO_PIN_SMCLK,
        GPIO_FUNCTION_SMCLK
        );
    //MCLK set out to pins
    GPIO_setAsPeripheralModuleFunctionOutputPin(
        GPIO_PORT_MCLK,
        GPIO_PIN_MCLK,
        GPIO_FUNCTION_MCLK
        );

    /*
     * Disable the GPIO power-on default high-impedance mode to activate
     * previously configured port settings
     */
    PMM_unlockLPM5();

    //Set DCO FLL reference = REFO
    CS_initClockSignal(
        CS_FLLREF,
        CS_REFOCLK_SELECT,
        CS_CLOCK_DIVIDER_1
        );

    //Set ACLK = REFO
    CS_initClockSignal(
        CS_ACLK,
        CS_REFOCLK_SELECT,
        CS_CLOCK_DIVIDER_1
        );
    
    //Create struct variable to store proper software trim values
    CS_initFLLParam param = {0};
    
    //Set Ratio/Desired MCLK Frequency, initialize DCO, save trim values
    CS_initFLLCalculateTrim(
        CS_MCLK_DESIRED_FREQUENCY_IN_KHZ,
        CS_MCLK_FLLREF_RATIO,
        &param
        );

    //Clear all OSC fault flag
    CS_clearAllOscFlagsWithTimeout(1000);

    //For demonstration purpose, change DCO clock freq to 16MHz
    CS_initFLLSettle(
        16000,
        487
        );

    //Clear all OSC fault flag
    CS_clearAllOscFlagsWithTimeout(1000);

    //Reload DCO trim values that were calculated earlier
    CS_initFLLLoadTrim(
        CS_MCLK_DESIRED_FREQUENCY_IN_KHZ,
        CS_MCLK_FLLREF_RATIO,
        &param
        );

    //Clear all OSC fault flag
    CS_clearAllOscFlagsWithTimeout(1000);

    //Enable oscillator fault interrupt
    SFR_enableInterrupt(SFR_OSCILLATOR_FAULT_INTERRUPT);

    // Enable global interrupt
    __bis_SR_register(GIE);

    //Verify if the Clock settings are as expected
    clockValue = CS_getSMCLK();
    clockValue = CS_getMCLK();
    clockValue = CS_getACLK();

    while (1)
    {
        GPIO_toggleOutputOnPin(
                GPIO_PORT_P5,
                    GPIO_PIN3
                    );

                //Delay
                __delay_cycles(1000000);
    }
}


#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=UNMI_VECTOR
__interrupt
#elif defined(__GNUC__)
__attribute__((interrupt(UNMI_VECTOR)))
#endif
void NMI_ISR(void)
{
  do {
    // If it still can't clear the oscillator fault flags after the timeout,
    // trap and wait here.
    status = CS_clearAllOscFlagsWithTimeout(1000);
  } while(status != 0);
}

How can I output the internal clock?
Also, please tell me where to change if I want to change the internal clock to "4MHz".
Thank you.

  • > #define GPIO_FUNCTION_MCLK GPIO_PRIMARY_MODULE_FUNCTION

    > #define GPIO_FUNCTION_SMCLK GPIO_PRIMARY_MODULE_FUNCTION

    > #define GPIO_FUNCTION_ACLK GPIO_PRIMARY_MODULE_FUNCTION

    Data sheet (SLASEO7C) Tables 9-23/-24 indicate that the PSEL for each of these is 10, so these should (all) use GPIO_SECONDARY_MODULE_FUNCTION

  • thank you.

    It worked, but when I clicked "Resume" in Debug, the operation became unstable, I could not get the MCLK output properly, and an error "Power Failure on Target CPU" occurred.
    Also, the "Mode" of MSP-FET keeps coming and going.
    When I clicked "Terminate" and turned the power back on, I was able to obtain the MCLK output.
    Power is connected externally.
    What's the problem?

  • Have you try some demo code from TI like 

    /* --COPYRIGHT--,BSD_EX
     * Copyright (c) 2018, Texas Instruments Incorporated
     * All rights reserved.
     *
     * Redistribution and use in source and binary forms, with or without
     * modification, are permitted provided that the following conditions
     * are met:
     *
     * *  Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     *
     * *  Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the
     *    documentation and/or other materials provided with the distribution.
     *
     * *  Neither the name of Texas Instruments Incorporated nor the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     *******************************************************************************
     *
     *                       MSP430 CODE EXAMPLE DISCLAIMER
     *
     * MSP430 code examples are self-contained low-level programs that typically
     * demonstrate a single peripheral function or device feature in a highly
     * concise manner. For this the code may rely on the device's power-on default
     * register values and settings such as the clock configuration and care must
     * be taken when combining code from several examples to avoid potential side
     * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
     * for an API functional library-approach to peripheral configuration.
     *
     * --/COPYRIGHT--*/
    //******************************************************************************
    //  MSP430FR267x Demo - Toggle P1.0 using software
    //
    //  Description: Toggle P1.0 every 0.05s using software.
    //  By default, FR267x select XT1 as FLL reference.
    //  If XT1 is present, the PxSEL(XIN & XOUT) needs to configure.
    //  If XT1 is absent, switch to select REFO as FLL reference automatically.
    //  XT1 is considered to be absent in this example.
    //  ACLK = default REFO ~32768Hz, MCLK = SMCLK = default DCODIV ~1MHz.
    //
    //           MSP430FR2676
    //         ---------------
    //     /|\|               |
    //      | |               |
    //      --|RST            |
    //        |           P1.0|-->LED
    //
    //   Longyu Fang
    //   Texas Instruments Inc.
    //   August 2018
    //   Built with IAR Embedded Workbench v7.12.1 & Code Composer Studio v8.1.0
    //******************************************************************************
    #include <msp430.h>
    
    int main(void)
    {
        WDTCTL = WDTPW | WDTHOLD;               // Stop watchdog timer
    
        P1OUT &= ~BIT0;                         // Clear P1.0 output latch for a defined power-on state
        P1DIR |= BIT0;                          // Set P1.0 to output direction
    
        PM5CTL0 &= ~LOCKLPM5;                   // Disable the GPIO power-on default high-impedance mode
                                                // to activate previously configured port settings
    
        while(1)
        {
            P1OUT ^= BIT0;                      // Toggle P1.0 using exclusive-OR
            __delay_cycles(50000);             // Delay for 50000*(1/MCLK)=0.05s
        }
    }
    

  • I don't see any obvious conflicts with those pins in the Launchpad schematics. Do you have anything (besides the scope) connected to those pins?

    Also, how do you have the MSP-FET connected to the Launchpad? (I always use the on-board ez-FET.)

  • I mounted MSP430FR2476 on the board instead of Launchpad and confirmed its operation.
    Nothing is connected to pins "P2.2", "P1.7", and "P1.3" other than the oscilloscope.

  • I don't see your symptom when I run this code on a Launchpad.

    How are you powering the board? Have you included the bypass caps on DVCC/DVSS? [Ref data sheet (SLASEO7C) Sec 10.1.1]

  • The capacitor is installed according to the data sheet.
    The power supply is 3.3[V] externally supplied to the microcontroller and MSP-FET.

  • If you're using an external (e.g. benchtop) power supply, be sure to connect the MSP-FET using J1 ("VCC TARGET"), not J2 ("VCC TOOL"). [Ref Hardware Tools UG (SLAU278AH) Fig 2-3] If you use J2 you'll have a conflict between the two supplies.

  • It was connected to "VCC TARGET".
    (Also, if you turn off the external power supply, communication with the microcontroller will no longer be possible, so this is probably correct.)

    This phenomenon occurs when the frequency output is set (defined as "P2.2", "P1.7", or "P1.3" in GPIO_PRIMARY_MODULE_FUNCTION).
    When the frequency output is not set, you can debug without any problems and there are no problems with operation.

  • You can try this demo code, to see if it works

    clock_output.c
    /* --COPYRIGHT--,BSD_EX
     * Copyright (c) 2018, Texas Instruments Incorporated
     * All rights reserved.
     *
     * Redistribution and use in source and binary forms, with or without
     * modification, are permitted provided that the following conditions
     * are met:
     *
     * *  Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     *
     * *  Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the
     *    documentation and/or other materials provided with the distribution.
     *
     * *  Neither the name of Texas Instruments Incorporated nor the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     *******************************************************************************
     *
     *                       MSP430 CODE EXAMPLE DISCLAIMER
     *
     * MSP430 code examples are self-contained low-level programs that typically
     * demonstrate a single peripheral function or device feature in a highly
     * concise manner. For this the code may rely on the device's power-on default
     * register values and settings such as the clock configuration and care must
     * be taken when combining code from several examples to avoid potential side
     * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
     * for an API functional library-approach to peripheral configuration.
     *
     * --/COPYRIGHT--*/
    //******************************************************************************
    //  MSP430FR267x Demo - Configure MCLK for 16MHz operation, and REFO sourcing
    //                                     FLLREF and ACLK.
    //
    //  Description: Configure MCLK for 16MHz. FLL reference clock is REFO. At this
    //                    speed, the FRAM requires wait states.
    //                    ACLK = default REFO ~32768Hz, SMCLK = MCLK = 16MHz.
    //                    Toggle LED to indicate that the program is running.
    //
    //                MSP430FR2676
    //         ---------------
    //     /|\|               |
    //      | |               |
    //      --|RST            |
    //        |          P1.0 |---> LED
    //        |               |
    //        |          P1.7 |---> SMCLK = 16MHz
    //        |          P2.2 |---> ACLK  = 32768Hz
    //
    //   Longyu Fang
    //   Texas Instruments Inc.
    //   August 2018
    //   Built with IAR Embedded Workbench v7.12.1 & Code Composer Studio v8.1.0
    //******************************************************************************
    #include <msp430.h>
    
    void Software_Trim();                        // Software Trim to get the best DCOFTRIM value
    #define MCLK_FREQ_MHZ 16                     // MCLK = 16MHz
    
    int main(void)
    {
        WDTCTL = WDTPW | WDTHOLD;                          // Stop watchdog timer
    
        // Configure one FRAM waitstate as required by the device datasheet for MCLK
        // operation beyond 8MHz _before_ configuring the clock system.
        FRCTL0 = FRCTLPW | NWAITS_1;
    
        __bis_SR_register(SCG0);                           // disable FLL
        CSCTL3 |= SELREF__REFOCLK;                         // Set REFO as FLL reference source
        CSCTL1 = DCOFTRIMEN_1 | DCOFTRIM0 | DCOFTRIM1 | DCORSEL_5;// DCOFTRIM=5, DCO Range = 16MHz
        CSCTL2 = FLLD_0 + 487;                             // DCOCLKDIV = 16MHz
        __delay_cycles(3);
        __bic_SR_register(SCG0);                           // enable FLL
        Software_Trim();                                   // Software Trim to get the best DCOFTRIM value
    
         CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK;        // set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz
                                                           // default DCOCLKDIV as MCLK and SMCLK source
    
         P1DIR |= BIT0 | BIT7 | BIT3;                   // set SMCLK ACLK and LED pin as output
         P1SEL1 |= BIT7 | BIT3;                         // set SMCLK P1.7 pin as second function
         P2DIR |= BIT2;
         P2SEL1 |= BIT2;                         // set ACLK P2.2 pin as second function
    
        PM5CTL0 &= ~LOCKLPM5;                              // Disable the GPIO power-on default high-impedance mode
                                                           // to activate previously configured port settings
    
        while(1)
        {
            P1OUT ^= BIT0;                                 // Toggle P1.0 using exclusive-OR
            __delay_cycles(50000);                       // Delay for 50000*(1/MCLK)=3.125 ms
        }
    }
    
    void Software_Trim()
    {
        unsigned int oldDcoTap = 0xffff;
        unsigned int newDcoTap = 0xffff;
        unsigned int newDcoDelta = 0xffff;
        unsigned int bestDcoDelta = 0xffff;
        unsigned int csCtl0Copy = 0;
        unsigned int csCtl1Copy = 0;
        unsigned int csCtl0Read = 0;
        unsigned int csCtl1Read = 0;
        unsigned int dcoFreqTrim = 3;
        unsigned char endLoop = 0;
    
        do
        {
            CSCTL0 = 0x100;                         // DCO Tap = 256
            do
            {
                CSCTL7 &= ~DCOFFG;                  // Clear DCO fault flag
            }while (CSCTL7 & DCOFFG);               // Test DCO fault flag
    
            __delay_cycles((unsigned int)3000 * MCLK_FREQ_MHZ);// Wait FLL lock status (FLLUNLOCK) to be stable
                                                               // Suggest to wait 24 cycles of divided FLL reference clock
            while((CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)) && ((CSCTL7 & DCOFFG) == 0));
    
            csCtl0Read = CSCTL0;                   // Read CSCTL0
            csCtl1Read = CSCTL1;                   // Read CSCTL1
    
            oldDcoTap = newDcoTap;                 // Record DCOTAP value of last time
            newDcoTap = csCtl0Read & 0x01ff;       // Get DCOTAP value of this time
            dcoFreqTrim = (csCtl1Read & 0x0070)>>4;// Get DCOFTRIM value
    
            if(newDcoTap < 256)                    // DCOTAP < 256
            {
                newDcoDelta = 256 - newDcoTap;     // Delta value between DCPTAP and 256
                if((oldDcoTap != 0xffff) && (oldDcoTap >= 256)) // DCOTAP cross 256
                    endLoop = 1;                   // Stop while loop
                else
                {
                    dcoFreqTrim--;
                    CSCTL1 = (csCtl1Read & (~DCOFTRIM)) | (dcoFreqTrim<<4);
                }
            }
            else                                   // DCOTAP >= 256
            {
                newDcoDelta = newDcoTap - 256;     // Delta value between DCPTAP and 256
                if(oldDcoTap < 256)                // DCOTAP cross 256
                    endLoop = 1;                   // Stop while loop
                else
                {
                    dcoFreqTrim++;
                    CSCTL1 = (csCtl1Read & (~DCOFTRIM)) | (dcoFreqTrim<<4);
                }
            }
    
            if(newDcoDelta < bestDcoDelta)         // Record DCOTAP closest to 256
            {
                csCtl0Copy = csCtl0Read;
                csCtl1Copy = csCtl1Read;
                bestDcoDelta = newDcoDelta;
            }
    
        }while(endLoop == 0);                      // Poll until endLoop == 1
    
        CSCTL0 = csCtl0Copy;                       // Reload locked DCOTAP
        CSCTL1 = csCtl1Copy;                       // Reload locked DCOFTRIM
        while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // Poll until FLL is locked
    }
    

  • I don't see this symptom on my Launchpad, using either PRIMARY or SECONDARY (but you still want SECONDARY). I don't have an MSP-FET, so maybe there's something going on there.

    Does this happen repeatedly? Does disconnecting the scope probes make a difference?

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