LP-MSPM0G3507: I2C slave has no stop condition

Part Number: LP-MSPM0G3507

Tool/software:

Hi, 

I am running an I2C target interrupt software example from MSPM0 SDK (i2c_target_rw_multibyte_fifo_interrupts). 

When reading data from the slave (LP-MSPM0G3507), the last bit seems to be a NACK bit and has no stop condition. Why is this the case?

START Condition:

NACK: 

Regards, 

Sya

  • Do you write to the slave or read from slave? For the stop condition is controlled by host side.

  • This does look suspiciously like your Target is holding (stretching) the clock, which it shouldn't be doing -- even if the TXFIFO is empty (the code does what it can to avoid this) the I2C unit should get off the bus as soon as it sees the NACK from the Controller.

    The first trace seems to show your Target responding to address 0x4A rather than 0x48. Have you made any changes to this program?

    Also, what are you using on the Controller side? (May or may not be relevant.)

  • Hi Bruce, thanks for your reply. In the syscfg of the software example "Enable Target Clock Stretching" is enabled. I will get some measurements when this setting is disabled to see if this solves it. 

    Yes I did change the address to 0x4A, which is expected. 

    On the controller side, I am using an Aadvark I2C Host Adapter. 

  • Clock stretching is normally a good thing. In particular, it would seem that the program's use of  Tx FIFO threshold=1 sets up a race in the absence of clock stretching.

    But turning it off might make a useful diagnostic/experiment.

  • Thanks Bruce and Gary. 

    I have solved the issue, turns out the Aadvark host adapter has "no stop condition" enabled as default. 

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