MSP430FR59471: Device definition

Part Number: MSP430FR59471

Tool/software:

Hi,
We are using the TI part MSP430FR59471IRHAT and have encountered an issue with pin 3 (P1.2/TA1.1/TAOCLK/COUT/A2/C2).
We suspect that this pin is being treated as an ADC input, which causes noise and instability in the measured analog inputs (A0, A14, and A30) when the voltage exceeds Vref INTERNAL (2.5V).

Can you help us understand how to configure this pin as an Input-GPIO in code, bypassing the 2.5V (Vref) limitation?

Here is the code we are using for pin 1.2:
P1DIR &= ~BIT2;
P1REN |= BIT2;
P1OUT &= ~BIT2;
P1IES &= ~BIT2;
P1IE |= BIT2;

Thank you for your assistance!

  • Hi, 

    For P1.2, it is near the P1.1 and P1.0, P1.1 and P1.0 is directly connect to ADC Vref.

    Some method you can try:

    1. Disable P1.0 and  P1.1's Vref from ADC. to see what will happen

    2. Fully disable P1.2's digital function, to see is there any noise from ADC anymore.

    3. Check your PCB layout, if the noise comes from a layout problem on the PCB trace, the noise can be removed.

        Such as force pull P1.2 to GND, and test ADC signal's noise.

        Or not use P1.2 anymore.

    Regards,

    Helic

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