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MSP430FR2676: Timing for Clearing the Internal Sampling Capacitor

DDdoor
Expert 2265 points
Part Number: MSP430FR2676

Tool/software:

Hello,

Since there is no information provided about the timing to clear the internal sampling capacitor, please let me know.

It seems that the internal sampling capacitor is cleared when it reaches the trip voltage.

In the explanation of Active Operation Mode, there is mention of "End of conversion" under (4).

Is it correct to assume that the capacitor is cleared at the timing of (4)?

・Active Operation Mode
software-dl.ti.com/.../ch_technology.html

Best regards,
DDdoor

  • 0
    TI__Genius 11135 points

    Hi DDdoor,

    I think there is necessary for internal samnpling capacitor to clear the internal sampling capacitor. While it should be considered into the adc conversion time.

    When the last times sampling and conversion is finished, it means that the ADC is ready for next sampling, and this time the internal capacitor should recover to the intial stage,

    As for the No. 4 stage, it mainly talk about the software timing cost, which is CPU opeation to handle the data and do some algotithm calculation.

    B.R.

    Sal

  • 0 in reply to Sal Ye
    TI__Guru 61821 points

    Hi DDdoor,

    The internal sampling cap is discharge either at the end of every measurement cycle, or just before a new measurement cycle start.  I would have to see if this is documented in the internal design document.  Is the customer asking how long does it take to discharge this cap, or they just want to know specifically when it occurs?

  • 0 in reply to Dennis Lehman
    Expert 2265 points

    Hello Dennis Lehman,

    Thank you for your support.

    It is the latter.
    The customer wants to know when it occurs.

    Best regards,
    DDdoor

  • 0 in reply to DDdoor
    TI__Guru 61821 points

    Hi DDdoor,

    Ok, I can confirm that the sampling capacitor, Cs, is discharged by the state machine at the start of every measurement cycle.  It is discharged to 0.5v by default, not 0v.  Reason has to do with the non-linear behavior from 0v to 0.5v.  This means the Cs capacitor is charged starting at 0.5v up to 1.0v during the charge/transfer process. 

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