MSP430FR2355: Watch Dog Timer Count Reset

Tool/software:

Hello,

I want to use Watch Dog Timer (WDT) for performing system restart in case of any software problem. I have configured WDT in default watchdog mode with alternating clock source (32k) and 1 second timeout. I am always clearing WDT count before 1 second. However, the WDT is continuously performing reset in my application. I have written simplified code for MSP-EXP430FR2355 EVM for debugging. Could anyone please check? Have I forgotten anything about configuring WDT?

#include <msp430.h>

//  f(DCODIV) = (60+1)*32768 Hz = 2 MHz (1.998.848)
static void init_clock_2MHz(void) {

    __bis_SR_register(SCG0);                                  // disable FLL
    CSCTL3 |= SELREF__REFOCLK;                                // Set REFO as FLL reference source
    CSCTL1 = DCOFTRIMEN_1 | DCOFTRIM0 | DCOFTRIM1 | DCORSEL_1;// DCO Range = 2 MHz
    CSCTL2 = FLLD_0 + 60;                                     // DCODIV = 2MHz
    __delay_cycles(3);
    __bic_SR_register(SCG0);// enable FLL
    // software_trim();                          // Software Trim to get the best DCOFTRIM value
    CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK;// set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz
                                              // default DCODIV as MCLK and SMCLK source
}

/**
 * main.c
 */
int main(void) {

    WDTCTL = WDTPW | WDTHOLD;// stop watchdog timer

    PM5CTL0 &= ~LOCKLPM5;// Disable the GPIO power-on default high-impedance mode
                         // to activate previously configured port settings
    init_clock_2MHz();

    /*! Initialize WDT */
    WDTCTL = WDT_ARST_1000;// Watchdog mode,  ACLK , 1sec timeout

    P1DIR |= BIT0;// Set P1.0 as output

    while (1) {

        /* Clear WDT count */
        WDTCTL |= (WDTPW + WDTCNTCL);

        P1OUT |= BIT0;// high

        __delay_cycles(5E5);// 0.25 sec

        P1OUT &= ~BIT0;// low

        __delay_cycles(5E5);// 0.25 sec
    }

    // return 0;
}

Thank you,

Hassan