MSP430 watch-dog increase up to 8s time-out

You don't write which MSp you are using. From the terms BCSCTL1 and CALDCO_8MHz, I assume you're using a 2xx family MSP with basic clock system +.

I don't see you setting up the 32kHz crysal you apparently want to use for the WDT. If teh sourc eclock (ACLK) fails (whcih likely is the case becauuse you don't wait for the crystal coming up - even if everyhting else were okay, the WDT will automatically switch to MCLK as clock source. And the WDT reset will happen after 4ms (32768/8MHz).

Hi,

the setting looks alright, however have you checked whether the ACLK is really running at 4096? You can try to output ACLK to a pin. Usually MSP430 devices should have a GPIO which can be used to output ACLK clock signal.

Hello, thanks for your reply :

1)i use msp430f249

2) my clock initialization source is    :

uint16_t    i;
    if (CALBC1_8MHZ ==0xFF || CALDCO_8MHZ == 0xFF)    {  while(1);   }
    //use calibration 8MHz for MCLK: Master clock and SMCLK: Sub-main clock. SMCLK is selected as DCOCLK = 8MHZ
    BCSCTL1 = CALBC1_8MHZ;
    // ACLK = LFXT1CLK/8
    BCSCTL1 |= DIVA_3;
    // Set DCO
    DCOCTL = CALDCO_8MHZ;

    for(i=2100;i>0;i--);                      // Wait for DCO to stabilize.

I added the for loop to wait for stabilization, but it is still the same ... any idea ?

thanks

thanks for your reply

Yes it seems that on my msp430f249 P1.0 can be ACLK; i coded the following :

void main(void)
{
    uint16_t    i;
    WDTCTL = WDTPW + WDTHOLD;
    // to test ACLK on P1.0
    P1DIR |= BIT0;                            // ACLK set out to pins
    P1SEL |= BIT0;
    if (CALBC1_8MHZ ==0xFF || CALDCO_8MHZ == 0xFF)
    {
        while(1);
    }
    //use calibration 8MHz for MCLK: Master clock and SMCLK: Sub-main clock. SMCLK is selected as DCOCLK = 8MHZ
    BCSCTL1 = CALBC1_8MHZ;
    // ACLK = LFXT1CLK/8
    BCSCTL1 |= DIVA_3;
    // Set DCO
    DCOCTL = CALDCO_8MHZ;

    for(i=2100;i>0;i--);                      // Wait for DCO to stabilize.
    while(1);

}

but on P1.0 i can't see anything toogling on the MSP430 debug board (P1.0 drives the led)

Hi,

trichet christophe said:

Yes it seems that on my msp430f249 P1.0 can be ACLK; i coded the following :

Looking into the datasheet, it should be P2.0 or P5.6:

so you can either do:

P2DIR |= BIT0;

P2SEL |= BIT0;

or 

P5DIR |= BIT6;

P5SEL |= BIT6;

Hello,

thank you for your reply, now i can see ACLK on P5.6 to the expected value of 32768/8=4096Hz

So with the following code i should have a 8s duration for the watch dog, but when the line " WDTCTL = (WDTPW+WDTCNTCL+WDTSSEL);" is not commented i can't see any more the ACLK on P5.0 because the MSP430 resets to soon : shoudn't it wait for 8s before reseting ?

void main(void)
{
    uint16_t    i;
    WDTCTL = WDTPW + WDTHOLD;
    //TODO : to test ACLK on P1.0
    P2DIR |= BIT0;                            // ACLK set out to pins
    P1OUT |= 0x01;

    P5DIR |= BIT6;
    P5SEL |= BIT6;

    if (CALBC1_8MHZ ==0xFF || CALDCO_8MHZ == 0xFF)
    {
        while(1);
    }
    //use calibration 8MHz for MCLK: Master clock and SMCLK: Sub-main clock. SMCLK is selected as DCOCLK = 8MHZ
    BCSCTL1 = CALBC1_8MHZ;
    // ACLK = LFXT1CLK/8
    BCSCTL1 |= DIVA_3;
    // Set DCO
    DCOCTL = CALDCO_8MHZ;

    for(i=2100;i>0;i--);                      // Wait for DCO to stabilize.
    WDTCTL = (WDTPW+WDTCNTCL+WDTSSEL);
    while(1)
    {P1OUT &= ~0x01;}

}

Hi,

i think you need to wait until the XT1 gets stable.

Could you add the following code after setting the DCO with 8 MHz?

   //use calibration 8MHz for MCLK: Master clock and SMCLK: Sub-main clock. SMCLK is selected as DCOCLK = 8MHZ
    BCSCTL1 = CALBC1_8MHZ;
    // ACLK = LFXT1CLK/8
    BCSCTL1 |= DIVA_3;
    // Set DCO
    DCOCTL = CALDCO_8MHZ;

  // wait until XT1 stabilizes

    do {

    IFG1 &= ~OFIFG;

    __delay_cycles(100);

  } while(IFG1 & OFIFG);

if you never come out of the loop during this initialization, you might want to check whether the LFXT1OF or XT2OF bits of BCSCTL3 is set.

EDIT: there was a typo in my first post, it should be IFG1 &= ~OFIFG;

thanks for the reply, but with the following code i still don't have a duration of 8s for my watch-dog : i measured P1 port is 20ms to 0 (=equl the duration of watch dog) and 70ms to 1 (duration of start-up) : do you know why i can't have a longer watch-dog with that code ? ACK is good on P5.6

void main(void)
{
    uint16_t    i;
    WDTCTL = WDTPW + WDTHOLD;
    //TODO : to test ACLK on P1.0
    P2DIR |= BIT0;                            // ACLK set out to pins
    P1DIR = 0xFF;                            // ACLK set out to pins
    P1OUT = 0xFF;//P1.5 ON

    P5DIR |= BIT6;
    P5SEL |= BIT6;

    if (CALBC1_8MHZ ==0xFF || CALDCO_8MHZ == 0xFF)
    {
        while(1);
    }
    //use calibration 8MHz for MCLK: Master clock and SMCLK: Sub-main clock. SMCLK is selected as DCOCLK = 8MHZ
    BCSCTL1 = CALBC1_8MHZ;
    // ACLK = LFXT1CLK/8
    BCSCTL1 |= DIVA_3;
    // Set DCO
    DCOCTL = CALDCO_8MHZ;

    // wait until XT1 stabilizes

        do {

        IFG1 &= ~OFIFG;

        __delay_cycles(100);

      } while(IFG1 & OFIFG);

    for(i=2100;i>0;i--);                      // Wait for DCO to stabilize.
    WDTCTL = (WDTPW+WDTCNTCL+WDTSSEL);
    WDTCTL = WDTPW + WDTCNTCL;
    while(1)
    {P1OUT= 0;}
}

Hi,

if your code really looks like that it seems that you overwrite the WDTCTL and in the end you use SMCLK as WDT clock source:

void main(void)
{
    uint16_t    i;
    WDTCTL = WDTPW + WDTHOLD;
    //TODO : to test ACLK on P1.0
    P2DIR |= BIT0;                            // ACLK set out to pins
    P1DIR = 0xFF;                            // ACLK set out to pins
    P1OUT = 0xFF;//P1.5 ON

    P5DIR |= BIT6;
    P5SEL |= BIT6;

    if (CALBC1_8MHZ ==0xFF || CALDCO_8MHZ == 0xFF)
    {
        while(1);
    }
    //use calibration 8MHz for MCLK: Master clock and SMCLK: Sub-main clock. SMCLK is selected as DCOCLK = 8MHZ
    BCSCTL1 = CALBC1_8MHZ;
    // ACLK = LFXT1CLK/8
    BCSCTL1 |= DIVA_3;
    // Set DCO
    DCOCTL = CALDCO_8MHZ;

    // wait until XT1 stabilizes

        do {

        IFG1 &= ~OFIFG;

        __delay_cycles(100);

      } while(IFG1 & OFIFG);

    for(i=2100;i>0;i--);                      // Wait for DCO to stabilize.
    WDTCTL = (WDTPW+WDTCNTCL+WDTSSEL);
    WDTCTL = WDTPW + WDTCNTCL; // use SMCLK instead ACLK?
    while(1)
    {P1OUT= 0;}
}

Hello, yes you are rigth, but even when i suppress this line i get the same result : P1 is to 0 level for about 70ms : why can't i increase the watch dog duration ?

trichet christophe said:

P1 is to 0 level for about 70ms

70ms looks like a ~450kHz clock. I wonder where this might come from. It doesn't fit anything...

Thank you for your reply,

have you an example of setting the msp430f249 watch-dog to be driven by ACLK (set to 32768Hz/8 from LFXT1clock divided by 8 with  "BCSCTL1 |= DIVA_3" instruction) and being divided by 32768 (by "WDTCTL = (WDTPW+WDTCNTCL+WDTSSEL)" instruction) ?

This should give a watch-dog of 8s : am I right or not ?

thanks

Hello,

do you know where i can get an example of setting the msp430f249 watch-dog to be driven by ACLK (set to 32768Hz/8 from LFXT1clock divided by 8 with  "BCSCTL1 |= DIVA_3" instruction) and being divided by 32768 (by "WDTCTL = (WDTPW+WDTCNTCL+WDTSSEL)" instruction) ?

This should give a watch-dog of 8s : am I right or not ?

Hello,

i don't know how to change subject in this forum, so i use the reply button... sorry.

I want to use temperature sensor of MSP430 with 1,5V reference, but the value returned by the ADC is not valid (offset of 7 °C); i have seen calibration indexes CAL_ADC_15T30, CAL_ADC_15VREF_FACTOR...

Is MSP430 calibrated for temperature ?and can calibration be retreived from these index ?

Is there software example of how to use calibration data of MSP4>30

Thanks

trichet christophe said:

i don't know how to change subject in this forum, so i use the reply button... sorry.

trichet christophe said:

Is MSP430 calibrated for temperature ?and can calibration be retreived from these index ?

If you want more precise results, you can calibrate the MSP yourself. Keep in mind that die temperature isn't necessarily ambient temperature. (which is the reason for the +-3°C - TI doesn't have unlimited time for the calibration, to let the die temperature settle)

Since the temperature calibraiton value is already the ADC output for this temperature, the reference, gain and offset calibration values for the ADC are already part of it and don't need to be applied again.