MSP430F5329: Clock switching time by UCS fail‐safe operation

UNA

Part Number: MSP430F5329

Hi,

I have question about UCS fail-safe.
When the MCLK and ACLK source is sourced from XT1 and operating in LF mode, MCLK and ACLK is switched to REFO if an oscillator failure occurs.
How long does it take to switch to REFO after the XT1 supply stop?
Also, I think that the clock supplied to the CPU and peripheral modules is stopped during this period. Is my recognition correct?

Best Regards,
H.U

over 4 years ago

0 Christopher Vendette over 4 years ago

TI__Intellectual 2315 points

Hi H.U,

An MSP team member has been assigned to review your issue. Please expect a response shortly.

0 UNA over 4 years ago in reply to Christopher Vendette

Mastermind 7980 points

Hi Christopher Vendette,

Thank you for your reply.
I am waiting for a response from the MSP team. Could you confirm their situation?

Best Regards,
H.U

0 Christopher Vendette over 4 years ago in reply to UNA

TI__Intellectual 2315 points

Hi H.U.,

Please look at page 25, section 5.18 of the MSP430F532x Mixed-Signal Microcontrollers datasheet which lists in the REFO startup time in the bottom row of the table.

-Chris

0 UNA over 4 years ago in reply to Christopher Vendette

Mastermind 7980 points

Hi Cris,

Are you say that it take 25us (TYP) to switch to REFO with failsafe operation after XT1 stop?
Also, does it mean that CPU and peripheral modules will stop for a period of 25us?

Best Regards,
H.U

0 UNA over 4 years ago in reply to Christopher Vendette

Mastermind 7980 points

Hi Chris,

Sorry for rush.
I am waiting for your comment on this issue. A prompt reply will be greatly appreciated.

Best Regards,
H.U

0 Christopher Vendette over 4 years ago in reply to UNA

TI__Intellectual 2315 points

Hi H.U.,

Sorry for the delay here,

The time it takes for the REFO to begin is 25 us - Unless REFO is active for another purpose in your application. In that case, you can ignore the startup time.

As for the full time of the process taking place - there will most likely be some some natural propagation in this time. Including if you are waking up from a Low-Power mode.

Best,

-Chris

0 UNA over 4 years ago in reply to Christopher Vendette

Mastermind 7980 points

Hi Chris,

Thank you for your comment.
I understood that the fail-safe switching time changes depending on the situation and is not explicitly specified.

Best Regards,
H.U

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MSP430F5329: Clock switching time by UCS fail‐safe operation