CCS/MSP432P401R: MSP432 Multiple SPI Slave Devices in one SPI bus

Tool/software: Code Composer Studio

Hi All

I want to use a MSP432P401R to control two SPI slave devices in one SPI bus with separate chip select pins (other SPI buses on my 432 are occupied).

Question/Problem

I have no trouble to control these two devices when deploying my debug code from a launch pad  to my final target (MSP432 on my PCB).

However, when I stop debug in CCS, reboot the target MSP432 and my PCB, only one SPI slave device work.

Trouble shooting steps

1. At the first, I wonder if the failed slave device takes long time after reset, I add some delay before calling the failed slave device, my problem still exists.

2. I swap the SPI calling order; the problem still exists.

3. I wonder if the code burning process does complete successfully; while all other devices controlled by the 432 on my PCB work.

Part of My code

const eUSCI_SPI_MasterConfig spiMasterConfigADF4351 =
{
        EUSCI_A_SPI_CLOCKSOURCE_SMCLK,             // SMCLK Clock Source
        3000000,                                   // SMCLK = DCO = 3MHZ
        500000,                                    // SPICLK = 500khz
        EUSCI_A_SPI_MSB_FIRST,                     // MSB First
        EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT,
        EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW,  // CLK low when SPI not enabled for ADF4351
        EUSCI_A_SPI_3PIN                           // 3Wire SPI Mode
};

const eUSCI_SPI_MasterConfig spiMasterConfigAD8366 =
{
        EUSCI_A_SPI_CLOCKSOURCE_SMCLK,             // SMCLK Clock Source
        3000000,                                   // SMCLK = DCO = 3MHZ
        500000,                                    // SPICLK = 500khz
        EUSCI_A_SPI_MSB_FIRST,                     // MSB First
        EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT,    // Phase
        //EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT,
        EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW, // High polarity
        EUSCI_A_SPI_3PIN                           // 3Wire SPI Mode
};

// Typical 3 pin SPI initialization
GPIO_setAsPeripheralModuleFunctionInputPin(ADF4351_SPIPort, ADF4351_SPICLK | ADF4351_SPISIMO | ADF4351_SPISOMI, GPIO_PRIMARY_MODULE_FUNCTION);
SPI_initMaster(ADF4351_SPI, &spiMasterConfigADF4351);
SPI_enableModule(ADF4351_SPI);


GPIO_setAsOutputPin(ADF4351_CSPort, ADF4351_CSPin);
// set chip select high as default value
GPIO_setOutputHighOnPin(ADF4351_CSPort, ADF4351_CSPin);
GPIO_setAsOutputPin(AD8366_CSPort, AD8366_CSPin);


adf4351_initialization (ADF4351_SPI, ADF4351_CSPort, ADF4351_CSPin);
SPI_disableModule(ADF4351_SPI);

// re-config SPI since SPI master configurations of the two devices are different    
GPIO_setAsPeripheralModuleFunctionInputPin(AD8366_SPIPort, AD8366_SPICLK | AD8366_SPISIMO | AD8366_SPISOMI, GPIO_PRIMARY_MODULE_FUNCTION);
SPI_initMaster(AD8366_SPI, &spiMasterConfigAD8366);
SPI_enableModule(AD8366_SPI);

AD8366_Set_Gain (4500, 4500, AD8366_SPI, AD8366_CSPort, AD8366_CSPin);

PS.

Software platform CCS 8.3.0.0009

Hardware: MSP432P401R launch pad -> JATG ->  target MSP432P401R