CCS/MSP430FR2355: EVM -- ACLK 32.768k, SMCLK, MCLK 16MHz

steve wenner

Part Number: MSP430FR2355

Tool/software: Code Composer Studio

Good afternoon.

Running an EVM. I have a small block of code to set up ACLK to 32kHz LFXT and use the DCO with FLL at 16MHz for SMCLK, MCLK. If I run code with the debugger I get 16MHz clock just fine. If I remove all the jumpers other than Ground that connect the EZ-FET to the Target and plug a power supply into 3.3V (verified) my code doesn't seem to work the same. Meaning...I have an LED to turn on after the clock has been set up. With debugger LED turns on, without debugger and using the power supply LED does not turn on HOWEVER the clock appears to be running at 16MHz. My question is can someone please verify for me that my clock setup seems to be correct? I specifically do NOT want to do the TRIM piece that is talked about in the user guide. Would just like to set the DCO and an FLL and run close to the 16MHz. Also any ideas as to why the LED doesn't want to come on when no debugger yet clock runs.

    FRCTL0 = FRCTLPW | NWAITS_2;
    do
    {
        CSCTL7 &= ~(XT1OFFG | DCOFFG);           // Clear XT1 and DCO fault flag
        SFRIFG1 &= ~OFIFG;
    } while (SFRIFG1 & OFIFG);                   // Test oscillator fault flag

    __bis_SR_register(SCG0);                     // disable FLL
    CSCTL3 |= SELREF__XT1CLK;                    // Set XT1 as FLL reference source
    CSCTL0 = 0x155;
    CSCTL1 = DCORSEL_5;// DCOFTRIM=5, DCO Range = 16MHz
    CSCTL2 = FLLD_0 + 487;                       // DCOCLKDIV = 16MHz
    CSCTL6 = 0x0030;
    __delay_cycles(3);
    __bic_SR_register(SCG0);                     // enable FLL
//    Software_Trim();
    while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1));
    CSCTL4 = SELMS__DCOCLKDIV | SELA__XT1CLK;   // set XT1 (~32768Hz) as ACLK source, ACLK = 32768Hz

Thanks

Steve

over 4 years ago

0 Johnson He over 4 years ago

TI__Mastermind 28416 points

Hi steve,

Could you share some code related with led?

And maybe you can refer to this example code :

http://dev.ti.com/tirex/explore/node?node=AL7R3gqXs8yb3B3Ia83dVQ__IOGqZri__LATEST

Best Regards

Johnson

0 steve wenner over 4 years ago in reply to Johnson He

Expert 2355 points

Johnson....

Thank you for the response....The block of code I have added pretty much seems to have solved my issue. The DCO and FLL seem a bit confusing. I've used TI parts before and the Software_Trim function never before was necessary.....What is it's purpose? To hone in on the exact frequency that you want? I'm used to just setting the DCO and FLL and getting a frequency that is good enough....Can you tell me if my code is set up appropriately for 16MHz (SMCLK / MCLK) without the Software_Trim function?

Thanks

Steve

    FRCTL0 = FRCTLPW | NWAITS_1;
    do
    {
        CSCTL7 &= ~(XT1OFFG | DCOFFG);           // Clear XT1 and DCO fault flag
        SFRIFG1 &= ~OFIFG;
    } while (SFRIFG1 & OFIFG);                   // Test oscillator fault flag

    __bis_SR_register(SCG0);                     // disable FLL
    CSCTL3 |= SELREF__XT1CLK;                    // Set XT1 as FLL reference source
    CSCTL0 = 0;
    CSCTL1 &= ~(DCORSEL_7);
    CSCTL1 |= DCORSEL_5;// DCOFTRIM=5, DCO Range = 16MHz
    CSCTL2 = FLLD_0 + 487;                       // DCOCLKDIV = 16MHz
    __delay_cycles(3);
    __bic_SR_register(SCG0);                     // enable FLL
//    Software_Trim();
    P6OUT &= ~BIT6;
    while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1));
    CSCTL4 = SELMS__DCOCLKDIV | SELA__XT1CLK;   // set XT1 (~32768Hz) as ACLK source, ACLK = 32768Hz

0 Johnson He over 4 years ago in reply to steve wenner

TI__Mastermind 28416 points

Hi Steve,

Software_Trim() is to speed up the stabilization time of the DCO clock. Of course, it can be left unused. After FLL is enabled, the clock will automatically lock to the set time.

Best Regards

Johnson

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CCS/MSP430FR2355: EVM -- ACLK 32.768k, SMCLK, MCLK 16MHz