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MSP430FR2676: Does this have "Enhanced" Clock System (CS)? Want to use VLO for ACLK

Bill Ponikvar
Prodigy 100 points
Part Number: MSP430FR2676

QUESTION:

  • Does the MSP430FR2676 have the Enhanced Clock System or Not?
  • Can I have VLO be the source for ACLK?

Thank you so very much :)

Willie

-------------------------------------------

VERY Difficult to Tell from Datasheet or User Guide: (my guess is YES - Enhanced CS)

  • Page 55 of Datasheet (SLASE05C) - States: 

    "Auxiliary Clock (ACLK): This clock is derived from the external XT1 clock, internal VLO or internal
    REFO clock up to 40 kHz".

    So would think maybe this is a newer part and has the enhanced Clock System - but only goes to 16Mhz not 24Mhz (enchanced CS) - so again confusing.

  • Page 98 of User Guide (SLAU445I) - Table 3-1 does not list MSP430FR2676:
    • So not sure if enhanced or not

  • I know there was a post related to this when I searched - but for a different part #.about 1 year ago - so thought would ask again if ok.

  • 0
    TI__Intellectual 2100 points

    Hi Willie,

    I just checked the header file "msp430fr2676.h" that comes with CCS => the option to select VLO for ALCK is explicitly given.

    #define SELA__XT1CLK (0x0000) /* XT1CLK with divider (must be no more than 40 kHz) */

    #define SELA__REFOCLK (0x0100) /* REFO (internal 32-kHz clock source) */

    #define SELA__VLOCLK (0x0200) /* VLO (internal 10-kHz clock source) */

    #define SELA__RESERVED (0x0300) /* Reserved */

    DS, UG and .H file do not disagree.  Still I have not looked into the silicon yet, but I think this should do.

    have a nice day

        Johann

  • 0 in reply to Johann Zipperer
    Prodigy 100 points

    Hi Johann!

    Thank you so much for your reply :)

    I tried to implement in code and will always get 32.768Khz clock - even with CSCTL4 Registers SELA bits set to "10" or VLOCLK

    • I would expect to see 10Khz clock if VLO selected as source for ACLK.
    • Maybe I'm doing something dumb in code (in middle of modifying so can't show)

    I would love to mark Resolved - but I still can't get the VLO 10Khz clock on ACLK for my counter.

    I will post my complete code once stable again - in the mean time - below is what I tried.

    Thank you so much,

    Willie

    ---------------------

  • 0 in reply to Bill Ponikvar
    TI__Intellectual 2100 points

    Hi Willy,

    Well, I'll get a board and will "ask" the silicon-die itself.... .

    Might take a couple of days to get the right board in my hands... pls be patient.

    all the best from Germany so far...

         Johann

  • 0 in reply to Johann Zipperer
    Prodigy 100 points

    LOL - you are a good man Johann :)

    Appreciate your help more than can state and the best to you from USA!

  • 0 in reply to Bill Ponikvar
    Prodigy 100 points

    Hi Johann!!!

    Dude - you are 100% Correct:

    • I did get the VLO (10Khz oscillator) driving the ACLK (just as you said)
      • This MUST mean the MSP430FR2676 has the Enhanced Clock System
      • This means the Datasheet (SLASE05C) is 100% correct
      • Only thing is the User Guide just doesn't list the MSP430FR2676 (as either Normal or Enhanced CS)

    I will mark you response as Resolved my issue :)

    Thank you so much Johann!  (hope you didn't buy development board yet! - feel terrible if did)

    -------------------------

    What was my mistake earlier?

    • Previously when tried to Select VLO as source for ACLK
    • I Bit OR CSCTL4 with SELA__VLOCLK
    • The issue is by default SELA = 01 and if bit or it with SELA__VLOCLK (10) = 11 which is reserved (so didn't work)
    • So to fix:
      • CSCTL4 =  SELA__VLOCLK  (this works)
      • CSCTL4 |= SELA__VLOCLK  (DOES NOT WORK - because SELA defaults to 01 on power up)

    -------------------------

    Showing default of SELA in CSCTL4 (from User Guide):

     

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