MSP430FR2353: External 24MHz oscillator on XIN

d_zero

Dear *,

we have connected 24MHz oscillator on XIN pin of MSP430FR2353.

i'm unable to set the MCLK to 24MHz, i'm observing pin P2.6 as MCLK out and i'm getting 1MHz ( probably the fall-back mode)

Am i doing something wrong at CS initialization ?

code

#include <msp430.h>
#include <driverlib.h>

void init_CS();

/**
 * main.c
 */
int main(void)
{
	
	volatile uint32_t i;

    // Stop watchdog timer
    WDT_A_hold(WDT_A_BASE);

    // Disable the GPIO power-on default high-impedance mode
    // to activate previously configured port settings
    PMM_unlockLPM5();

    // Initialize external XT1CLK = 24MHz
    init_CS();

    // Output MCLK on P2.6
    P2DIR |= BIT6;                      // Configure P2.6 as output direction pin

    P2SEL0 |= BIT6;                     // Select P2.6 as MCLK out
    P2SEL1 &= ~(BIT6);                  // Select P2.6 as MCLK out

    // Set P6.1 to output direction
    GPIO_setAsOutputPin(
        GPIO_PORT_P6,
        GPIO_PIN1
        );

    while(1)
    {
        // Toggle P6.1 output
        GPIO_toggleOutputOnPin(
            GPIO_PORT_P6,
            GPIO_PIN1
            );

        // Delay
        for(i=10000; i>0; i--);
    }

}

void init_CS()
{
    //CSCTL4
        // set XT1CLK source for ACLK, MCLK, SMCLK
        CSCTL4 = SELMS__XT1CLK | SELA__XT1CLK;

    //CSCTL5
        // SMCLK ON | SMCLK DIV = 1 | MCLK DIV = 1
        CSCTL5 = SMCLKOFF_0 | DIVS_0 | DIVM_0;

    //CSCTL6
        // EN XT1 fault | ACLK = MCLK/768 | HDS | HF mode | XT1 EXT | 24MHz
        CSCTL6 = XT1FAULTOFF_0 | DIVA_8 | XT1DRIVE_3 | XTS_1 | XT1BYPASS_1 | XT1HFFREQ_3;

    //CSCTL7
        // Clear XT1 fault flag
        CSCTL7 &= ~(XT1OFFG);
}

Best Regards,

David.

over 5 years ago

0 Lixin Chen1 over 5 years ago

TI__Expert 7015 points

Hi,

I think you missed setting the P2.6, P2.7 as the crystal pins before setting the XT1BYPASS=1, XTS=1 and XT1HFFREQ=3.

P2SEL1 |= BIT6 | BIT7; // P2.6~P2.7: crystal pins

It is mentioned in the section 3.2.4 of the FR2Xx/4x user's guide (slau445).

Thanks,

Lixin

0 d_zero over 5 years ago in reply to Lixin Chen1

Genius 5055 points

Dear Lixin,

i'm not using external crystal, i'm using external crystal oscillator ECS-2520MV-240-BN.

do i need then only to configure the pin 2.7 as XIN with following code?

P2SEL0 &= ~(BIT7); // Select P2.7 as XIN
P2SEL1 |= BIT7; // Select P2.7 as XIN

Best Regards,

David.

0 d_zero over 5 years ago in reply to d_zero

Genius 5055 points

Dear Lixin,

i added following but there is no change ?

#include <msp430.h>
#include <driverlib.h>

void init_CS();

/**
 * main.c
 */
int main(void)
{
	
	volatile uint32_t i;

    // Stop watchdog timer
    WDT_A_hold(WDT_A_BASE);

    // Output MCLK on P2.6
    P2DIR |= BIT6;                      // Configure P2.6 as output direction pin

    P2SEL0 |= BIT6;                     // Select P2.6 as MCLK out
    P2SEL1 &= ~(BIT6);                  // Select P2.6 as MCLK out

    // Output SMCLK on P1.0
    P1DIR |= BIT0;                      // Configure P1.0 as output direction pin

    P1SEL0 &= ~(BIT0);                  // Select P1.0 as SMCLK out
    P1SEL1 |= BIT0;                     // Select P1.0 as SMCLK out

    // Output ACLK on P1.1
    P1DIR |= BIT1;                      // Configure P1.1 as output direction pin

    P1SEL0 &= ~(BIT1);                  // Select P1.1 as ACLK out
    P1SEL1 |= BIT1;                     // Select P1.1 as ACLK out

    // Set P6.1 to output direction
    GPIO_setAsOutputPin(
        GPIO_PORT_P6,
        GPIO_PIN1
        );

    // Disable the GPIO power-on default high-impedance mode
    // to activate previously configured port settings
    PMM_unlockLPM5();

    // Initialize external XT1CLK = 24MHz
    init_CS();

    while(1)
    {
        // Toggle P6.1 output
        GPIO_toggleOutputOnPin(
            GPIO_PORT_P6,
            GPIO_PIN1
            );

        // Delay
        for(i=10000; i>0; i--);
    }

}

void init_CS()
{
    P2SEL0 &= ~(BIT7);                     // Select P2.7 as XIN
    P2SEL1 |= BIT7;                        // Select P2.7 as XIN

    //CSCTL4
        // set XT1CLK source for ACLK, MCLK, SMCLK
        CSCTL4 = SELMS__XT1CLK | SELA__XT1CLK;

    //CSCTL5
        // SMCLK ON | SMCLK DIV = 1 | MCLK DIV = 1
        CSCTL5 = SMCLKOFF_0 | DIVS_0 | DIVM_0;

    //CSCTL6
        // EN XT1 fault | ACLK = MCLK/768 | HDS | HF mode | XT1 EXT | 24MHz
        CSCTL6 = XT1FAULTOFF_0 | DIVA_8 | XT1DRIVE_3 | XTS_1 | XT1BYPASS_1 | XT1HFFREQ_3 | XT1AUTOOFF_1;

    //CSCTL7
        // Clear XT1 fault flag
        CSCTL7 &= ~(XT1OFFG);

        SFRIFG1 &= ~(OFIFG);

}

0 d_zero over 5 years ago in reply to d_zero

Genius 5055 points

Dear Lixin,

i couldn't find a function in cs.c driver library for bypass XT1 mode when external HF oscillator is used so i rewrite the void CS_bypassXT1(void) function as following:

void CS_bypassXT1_HF()
{
    //Enable HF/LF mode
    HWREG16(CS_BASE + OFS_CSCTL6) |= XTS;

    //Switch OFF XT1 oscillator and enable BYPASS mode
    HWREG16(CS_BASE + OFS_CSCTL6) |= (XT1BYPASS | XT1AUTOOFF);

    while (HWREG8(CS_BASE + OFS_CSCTL7) & (XT1OFFG)) {
        //Clear OSC fault flags
        HWREG8(CS_BASE + OFS_CSCTL7) &= ~(XT1OFFG);

        // Clear the global fault flag. In case the XT1 caused the global fault
        // flag to get set this will clear the global error condition. If any
        // error condition persists, global flag will get again.
        HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
    }
}

and after that i used in my initialization function as in code bellow and now i get the right clocks.

But one thing regarding ACLK when i use

CS_initClockSignal(CS_ACLK, CS_XT1CLK_SELECT, CS_CLOCK_DIVIDER_768);

then i get 24MHz/ 768 = 31.25kHz

but when i call

CS_initClockSignal(CS_ACLK, CS_XT1CLK_SELECT, CS_CLOCK_DIVIDER_1024);

then i don't get 24MHz/ 1024 but i get 24MHz/ 768 , why is that so??

#include <msp430.h>
#include <driverlib.h>

void init_CS();
void CS_bypassXT1_HF();

/**
 * main.c
 */
int main(void)
{
	
	volatile uint32_t i;

    // Stop watchdog timer
    WDT_A_hold(WDT_A_BASE);

    init_CS();

    // Output MCLK on P2.6
    P2DIR |= BIT6;                      // Configure P2.6 as output direction pin

    P2SEL0 |= BIT6;                     // Select P2.6 as MCLK out
    P2SEL1 &= ~(BIT6);                  // Select P2.6 as MCLK out

    // Output SMCLK on P1.0
    P1DIR |= BIT0;                      // Configure P1.0 as output direction pin

    P1SEL0 &= ~(BIT0);                  // Select P1.0 as SMCLK out
    P1SEL1 |= BIT0;                     // Select P1.0 as SMCLK out

    // Output ACLK on P1.1
    P1DIR |= BIT1;                      // Configure P1.1 as output direction pin

    P1SEL0 &= ~(BIT1);                  // Select P1.1 as ACLK out
    P1SEL1 |= BIT1;                     // Select P1.1 as ACLK out

    // Set P6.1 to output direction
    GPIO_setAsOutputPin(
        GPIO_PORT_P6,
        GPIO_PIN1
        );

    // Disable the GPIO power-on default high-impedance mode
    // to activate previously configured port settings
    PMM_unlockLPM5();

    while(1)
    {
        // Toggle P6.1 output
        GPIO_toggleOutputOnPin(
            GPIO_PORT_P6,
            GPIO_PIN1
            );

        // Delay
        for(i=10000; i>0; i--);
    }

}

void init_CS()
{
    P2SEL0 &= ~(BIT7);                     // Select P2.7 as XIN
    P2SEL1 |= BIT7;                        // Select P2.7 as XIN

    //CSCTL4
        // set XT1CLK source for ACLK, MCLK, SMCLK
        //CSCTL4 = SELMS__XT1CLK | SELA__XT1CLK;

    //CSCTL5
        // SMCLK ON | SMCLK DIV = 1 | MCLK DIV = 1
        //CSCTL5 = SMCLKOFF_0 | DIVS_0 | DIVM_0;

    //CSCTL6
        // ACLK = MCLK/768 | XT1 high-frequency selection
        //CSCTL6 = DIVA_8;

        CS_initClockSignal(CS_MCLK, CS_XT1CLK_SELECT, CS_CLOCK_DIVIDER_1);
        CS_initClockSignal(CS_SMCLK, CS_XT1CLK_SELECT, CS_CLOCK_DIVIDER_1);
        CS_initClockSignal(CS_ACLK, CS_XT1CLK_SELECT, CS_CLOCK_DIVIDER_1024);
        
        //CS_bypassXT1();
        CS_bypassXT1_HF();
}

void CS_bypassXT1_HF()
{
    //Enable HF/LF mode
    HWREG16(CS_BASE + OFS_CSCTL6) |= XTS;

    //Switch OFF XT1 oscillator and enable BYPASS mode
    HWREG16(CS_BASE + OFS_CSCTL6) |= (XT1BYPASS | XT1AUTOOFF);

    while (HWREG8(CS_BASE + OFS_CSCTL7) & (XT1OFFG)) {
        //Clear OSC fault flags
        HWREG8(CS_BASE + OFS_CSCTL7) &= ~(XT1OFFG);

        // Clear the global fault flag. In case the XT1 caused the global fault
        // flag to get set this will clear the global error condition. If any
        // error condition persists, global flag will get again.
        HWREG8(SFR_BASE + OFS_SFRIFG1) &= ~OFIFG;
    }
}

Best Regards,

David.

0 Lixin Chen1 over 5 years ago in reply to d_zero

TI__Expert 7015 points

Sorry for late reply due to sick leave.

I will try to test on board and wave generation in lab next week and send you the result.

Thanks,

Lixin

0 Lixin Chen1 over 5 years ago in reply to Lixin Chen1

TI__Expert 7015 points

Hi,

Can you try the configuration for CSCTL6 in init_CS() like following?

CSCTL6 = DIVA_8 | XT1DRIVE_3 | XTS_1 | XT1HFFREQ_3;

I have tested and it works to input external clock to XT1IN.

Thanks,

Lixin

0 Lixin Chen1 over 5 years ago in reply to Lixin Chen1

TI__Expert 7015 points

Hi,

Except the CSCTL6 setting as above, please also add following 2 settings for XIN input external clock 24MHz.

1. When working with MCLK as frequency >8MHz, the FRAM waitstate should be set accordingly. For 24MHz, the waitstate should be set to 2.

So please add the following setting before MCLK switched to 24MHz:

FRCTL0 = FRCTLPW | NWAITS_2;

2. After setting the XIN function, XT1OFFG, DCOFFT and OFIFG need to be cleared before switching XIN input clock to MCLK. Please add following code after the CSCTL6 setting:

P2SEL1 |= BIT7;
do
{
CSCTL7 &= ~(XT1OFFG | DCOFFG); // Clear XT1 and DCO fault flag
SFRIFG1 &= ~OFIFG;
} while (SFRIFG1 & OFIFG); // Test oscillator fault flag
CSCTL4 = SELMS__XT1CLK;

Thanks,

Lixin

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MSP430FR2353: External 24MHz oscillator on XIN