DRV8300: Possible to use DRV8300 as non-boosted gate drive outputs (half for P FETs, swapping high side and low side inputs/outputs)?

Hi Alicia,

From my understanding, the bootstrap is only necessary when using dual N-FETs for the actual high- and low-side phase drivers, correct? My apologies, but we are looking to use the DRV8300 with a different phase driver architecture, specifically using a P-FET for the high-side driver, and an N-FET only for the low-side driver. Because of this, I think a bootstrap voltage is no longer necessary, as the gate of the high-side P-FET only needs to swing between 0V and the motor power rail. 

The issue though is that we must then invert the control signal going to the high side control input pins. We were thinking that, rather than inverting the signal in our motor control firmware, we could instead use the MODE pin and invert the low side control input pins, and swap to using the "low side" control pins for the high side P-FET gates in our topology instead. The "high side" pins would then control the actual low side N-FETs in our topology, and so would not need the boost voltage rail as the low side N-FETs sources' stay at 0V.

Please let me know if this is still confusing, I can put up a rough schematic of what I am thinking of.

Regards,

Amaresh

Hi Amaresh,

If you could provide a schematic showcasing what you are describing, that would be great. 

Also, something to keep in mind, the DRV8300 is protected against BSTx under-voltage, refer to section 8.3.3 Gate Driver Protective Circuits of the datasheet for more detailed information. To summarize, if there is ever a point where the voltage on one of the BSTx pins falls below the V_BSTUV threshold, the high side external MOSFET of that phase will be disabled by disabling the GHx pins until the BSTx under-voltage condition is cleared. Therefore, in order to maintain the bootstrap voltage above the under-voltage lockout, an appropriately sized bootstrap capacitor must be chosen.

Best,

~Alicia

Hi Alicia,

Here is a schematic snippet showing how we are planning on using the DRV8300:

To get over the boost undervoltage lockout, we are grounding all the source feedback pins, and also bypassing the internal boost diode as it is not necessary with the P-FETs being on the high side. I believe this should allow any voltage rail above the Vbstuv max threshold to be used, as long as there is enough local capacitance to keep the motor power rail stable at higher switching frequencies. There are some additional details/notes in the schematic snippet but please let me know if you need any more info.

Regards,

Amaresh

Hi Amaresh,

Thank you for sharing the schematic. I will aim to provide some feedback before the end of next week.

Best,

~Alicia